index
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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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riscv
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lib
Age
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Author
Files
Lines
2023-03-20
riscv: optimized memset
Matteo Croce
3
-114
/
+41
2023-03-20
riscv: optimized memmove
Matteo Croce
3
-317
/
+23
2023-03-20
riscv: optimized memcpy
Matteo Croce
3
-109
/
+97
2022-08-11
riscv: lib: uaccess: fix CSR_STATUS SR_SUM bit
Chen Lifu
1
-2
/
+2
2022-03-10
riscv: Fixed misaligned memory access. Fixed pointer comparison.
Michael T. Kloos
1
-58
/
+310
2022-01-06
riscv: extable: consolidate definitions
Jisheng Zhang
1
-4
/
+2
2022-01-06
riscv: lib: uaccess: fold fixups into body
Jisheng Zhang
1
-11
/
+11
2022-01-06
riscv: switch to relative exception tables
Jisheng Zhang
1
-2
/
+2
2021-11-09
include/linux/delay.h: replace kernel.h with the necessary inclusions
Andy Shevchenko
1
-0
/
+4
2021-07-24
riscv: __asm_copy_to-from_user: Fix: Typos in comments
Akira Tsukamoto
1
-9
/
+9
2021-07-24
riscv: __asm_copy_to-from_user: Remove unnecessary size check
Akira Tsukamoto
1
-1
/
+0
2021-07-24
riscv: __asm_copy_to-from_user: Fix: fail on RV32
Akira Tsukamoto
1
-1
/
+1
2021-07-24
riscv: __asm_copy_to-from_user: Fix: overrun copy
Akira Tsukamoto
1
-3
/
+3
2021-07-07
riscv: __asm_copy_to-from_user: Optimize unaligned memory access and pipeline...
Akira Tsukamoto
1
-35
/
+146
2021-01-15
riscv: Add support for function error injection
Guo Ren
2
-0
/
+12
2020-12-11
riscv: provide memmove implementation
Nylon Chen
2
-0
/
+65
2020-10-04
riscv: use memcpy based uaccess for nommu again
Christoph Hellwig
1
-1
/
+1
2020-04-09
Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/...
Linus Torvalds
1
-4
/
+2
2020-03-19
riscv: uaccess should be used in nommu mode
Greentime Hu
1
-1
/
+1
2020-03-03
RISC-V: Stop using LOCAL for the uaccess fixups
Palmer Dabbelt
1
-4
/
+2
2020-01-23
riscv: Add KASAN support
Nick Hu
2
-4
/
+6
2020-01-19
riscv: Less inefficient gcc tishift helpers (and export their symbols)
Olof Johansson
1
-18
/
+57
2019-12-28
riscv: fix compile failure with EXPORT_SYMBOL() & !MMU
Luc Van Oostenryck
1
-0
/
+4
2019-11-18
riscv: add nommu support
Christoph Hellwig
1
-6
/
+5
2019-11-05
riscv: abstract out CSR names for supervisor vs machine mode
Christoph Hellwig
1
-6
/
+6
2019-08-30
riscv: Using CSR numbers to access CSRs
Bin Meng
1
-6
/
+6
2019-08-09
RISC-V: Remove udivdi3
Palmer Dabbelt
2
-34
/
+0
2019-08-09
riscv: delay: use do_div() instead of __udivdi3()
Paul Walmsley
1
-1
/
+5
2019-06-17
Merge tag 'riscv-for-v5.2/fixes-rc6' of git://git.kernel.org/pub/scm/linux/ke...
Linus Torvalds
1
-1
/
+1
2019-06-11
riscv: Fix udelay in RV32.
Nick Hu
1
-1
/
+1
2019-06-05
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
Thomas Gleixner
5
-45
/
+5
2019-05-21
treewide: Add SPDX license identifier - Makefile/Kconfig
Thomas Gleixner
1
-0
/
+1
2018-12-21
RISC-V: lib: minor asm cleanup
Olof Johansson
2
-48
/
+53
2018-11-13
RISC-V: lib: Fix build error for 64-bit
Olof Johansson
1
-1
/
+1
2018-10-23
RISC-V: Build tishift only on 64-bit
Zong Li
1
-1
/
+2
2018-08-13
RISC-V: implement __lshrti3.
Alex Guo
2
-0
/
+43
2018-06-11
RISC-V: Make our port sparse-clean
Palmer Dabbelt
1
-2
/
+4
2018-06-09
riscv: split the declaration of __copy_user
Luc Van Oostenryck
1
-2
/
+4
2018-06-04
riscv: Fix the bug in memory access fixup code
Alan Kao
1
-4
/
+9
2017-11-30
RISC-V: Export some expected symbols for modules
Olof Johansson
1
-0
/
+1
2017-09-27
RISC-V: Build Infrastructure
Palmer Dabbelt
1
-0
/
+6
2017-09-27
RISC-V: Device, timer, IRQs, and the SBI
Palmer Dabbelt
1
-0
/
+110
2017-09-27
RISC-V: Generic library routines and assembly
Palmer Dabbelt
4
-0
/
+390