index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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riscv
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kernel
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Author
Files
Lines
2020-05-21
RISC-V: gp_in_global needs register keyword
Palmer Dabbelt
1
-1
/
+1
2020-05-13
riscv: stacktrace: Fix undefined reference to `walk_stackframe'
Kefeng Wang
1
-1
/
+1
2020-05-13
riscv: perf: RISCV_BASE_PMU should be independent
Kefeng Wang
1
-1
/
+1
2020-05-11
riscv: perf_event: Make some funciton static
Kefeng Wang
1
-4
/
+4
2020-05-05
riscv: force __cpu_up_ variables to put in data section
Zong Li
1
-2
/
+2
2020-05-05
riscv: add Linux note to vdso
Andreas Schwab
2
-1
/
+13
2020-05-05
RISC-V: Add bitmap reprensenting ISA features common across CPUs
Anup Patel
1
-3
/
+80
2020-05-05
RISC-V: Export riscv_cpuid_to_hartid_mask() API
Anup Patel
1
-0
/
+2
2020-04-22
riscv: sbi: Fix undefined reference to sbi_shutdown
Kefeng Wang
1
-5
/
+8
2020-04-22
riscv: sbi: Correct sbi_shutdown() and sbi_clear_ipi() export
Kefeng Wang
1
-2
/
+2
2020-04-22
riscv: fix vdso build with lld
Ilie Halip
1
-3
/
+3
2020-04-21
RISC-V: stacktrace: Declare sp_in_global outside ifdef
Guenter Roeck
1
-2
/
+2
2020-04-09
Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/...
Linus Torvalds
18
-206
/
+1679
2020-04-03
Merge tag 'spdx-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gre...
Linus Torvalds
2
-0
/
+2
2020-04-03
riscv: Add SOC early init support
Damien Le Moal
4
-0
/
+36
2020-04-03
riscv: Unaligned load/store handling for M_MODE
Damien Le Moal
3
-4
/
+395
2020-03-31
RISC-V: Support cpu hotplug
Atish Patra
4
-1
/
+140
2020-03-31
RISC-V: Add supported for ordered booting method using HSM
Atish Patra
6
-3
/
+121
2020-03-31
RISC-V: Export SBI error to linux error mapping function
Atish Patra
1
-1
/
+2
2020-03-31
RISC-V: Add cpu_ops and modify default booting method
Atish Patra
4
-21
/
+113
2020-03-31
RISC-V: Move relocate and few other functions out of __init
Atish Patra
2
-72
/
+86
2020-03-31
RISC-V: Implement new SBI v0.2 extensions
Atish Patra
1
-4
/
+249
2020-03-31
RISC-V: Introduce a new config for SBI v0.1
Atish Patra
1
-23
/
+109
2020-03-31
RISC-V: Add basic support for SBI v0.2
Atish Patra
2
-2
/
+246
2020-03-31
Merge tag 'irq-core-2020-03-30' of git://git.kernel.org/pub/scm/linux/kernel/...
Linus Torvalds
1
-1
/
+1
2020-03-26
riscv: patch code by fixmap mapping
Zong Li
1
-9
/
+4
2020-03-26
riscv: introduce interfaces to patch kernel code
Zong Li
2
-1
/
+123
2020-03-26
riscv: add macro to get instruction length
Zong Li
1
-1
/
+2
2020-03-26
riscv: add alignment for text, rodata and data sections
Zong Li
1
-1
/
+4
2020-03-26
riscv: move exception table immediately after RO_DATA
Zong Li
1
-2
/
+4
2020-03-25
.gitignore: add SPDX License Identifier
Masahiro Yamada
2
-0
/
+2
2020-03-19
riscv: fix the IPI missing issue in nommu mode
Greentime Hu
1
-1
/
+1
2020-03-16
irqchip/sifive-plic: Enable/Disable external interrupts upon cpu online/offline
Atish Patra
1
-1
/
+1
2020-03-06
riscv: fix seccomp reject syscall code path
Tycho Andersen
2
-14
/
+8
2020-03-03
RISC-V: Inline the assembly register save/restore macros
Palmer Dabbelt
1
-82
/
+61
2020-03-03
RISC-V: Stop relying on GCC's register allocator's hueristics
Palmer Dabbelt
2
-5
/
+7
2020-03-03
RISC-V: Stop putting .sbss in .sdata
Palmer Dabbelt
1
-1
/
+0
2020-03-03
riscv: force hart_lottery to put in .sdata section
Zong Li
1
-2
/
+6
2020-03-03
riscv: avoid the PIC offset of static percpu data in module beyond 2G limits
Vincent Chen
1
-0
/
+16
2020-02-18
RISC-V: Don't enable all interrupts in trap_init()
Anup Patel
1
-2
/
+2
2020-02-18
riscv: set pmp configuration if kernel is running in M-mode
Greentime Hu
1
-0
/
+6
2020-01-31
Merge tag 'riscv-for-linus-5.6-mw0' of git://git.kernel.org/pub/scm/linux/ker...
Linus Torvalds
4
-0
/
+11
2020-01-29
Merge tag 'tty-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/greg...
Linus Torvalds
1
-4
/
+0
2020-01-28
Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/ker...
Linus Torvalds
1
-2
/
+2
2020-01-23
riscv: Add KASAN support
Nick Hu
4
-0
/
+11
2020-01-19
riscv: delete temporary files
Ilie Halip
1
-1
/
+2
2020-01-16
riscv: make sure the cores stay looping in .Lsecondary_park
Greentime Hu
1
-6
/
+10
2020-01-14
arch/riscv/setup: Drop dummy_con initialization
Arvind Sankar
1
-4
/
+0
2020-01-13
Merge tag 'riscv/for-v5.5-rc6' of git://git.kernel.org/pub/scm/linux/kernel/g...
Linus Torvalds
1
-1
/
+1
2020-01-12
riscv: Fixup obvious bug for fp-regs reset
Guo Ren
1
-1
/
+1
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