starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2025-06-05	riscv: misaligned: request misaligned exception from SBI	Clément Léger	1	-1/+7
2025-04-14	riscv: Fix unaligned access info messages	Andrew Jones	1	-14/+21
2025-03-20	Merge patch series "riscv: Unaligned access speed probing fixes and skipping"	Alexandre Ghiti	1	-91/+146
2025-03-19	riscv: Add parameter for skipping access speed tests	Andrew Jones	1	-66/+121
2025-03-19	riscv: Fix set up of vector cpu hotplug callback	Andrew Jones	1	-15/+16
2025-03-19	riscv: Fix set up of cpu hotplug callbacks	Andrew Jones	1	-14/+13
2025-03-19	riscv: Change check_unaligned_access_speed_all_cpus to void	Andrew Jones	1	-10/+5
2025-03-19	riscv: Fix check_unaligned_access_all_cpus	Andrew Jones	1	-4/+7
2025-03-19	riscv: Fix riscv_online_cpu_vec	Andrew Jones	1	-2/+4
2025-03-19	riscv: Annotate unaligned access init functions	Andrew Jones	1	-7/+7
2025-03-18	riscv: Fix missing __free_pages() in check_vector_unaligned_access()	Alexandre Ghiti	1	-1/+4
2024-10-18	RISC-V: Report vector unaligned access speed hwprobe	Jesse Taube	1	-2/+139
2024-10-18	RISC-V: Detect unaligned vector accesses supported	Jesse Taube	1	-10/+12
2024-10-18	RISC-V: Scalar unaligned access emulated on hotplug CPUs	Jesse Taube	1	-0/+1
2024-08-14	RISC-V: hwprobe: Add SCALAR to misaligned perf defines	Evan Green	1	-6/+6
2024-03-20	riscv: Use kcalloc() instead of kzalloc()	Erick Archer	1	-2/+1
2024-03-13	riscv: Set unaligned access speed at compile time	Charlie Jenkins	1	-0/+282