| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2023-01-03 | RISC-V: Remove the current perf implementation | Atish Patra | 1 | -485/+0 |
| 2020-05-11 | riscv: perf_event: Make some funciton static | Kefeng Wang | 1 | -4/+4 |
| 2019-05-17 | RISC-V: Access CSRs using CSR numbers | Anup Patel | 1 | -2/+2 |
| 2018-12-21 | RISC-V: Fix of_node_* refcount | Atish Patra | 1 | -0/+1 |
| 2018-08-13 | RISC-V: Fix !CONFIG_SMP compilation error | Atish Patra | 1 | -1/+0 |
| 2018-06-05 | perf: riscv: preliminary RISC-V support | Alan Kao | 1 | -0/+485 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |