Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2023-04-29 | RISC-V: Align SBI probe implementation with spec | Andrew Jones | 1 | -1/+1 |
2022-08-11 | riscv: ensure cpu_ops_sbi is declared | Conor Dooley | 1 | -0/+1 |
2022-08-11 | RISC-V: Declare cpu_ops_spinwait in <asm/cpu_ops.h> | Ben Dooks | 1 | -3/+1 |
2022-01-20 | RISC-V: Move spinwait booting method to its own config | Atish Patra | 1 | -0/+8 |
2022-01-20 | RISC-V: Use __cpu_up_stack/task_pointer only for spinwait method | Atish Patra | 1 | -16/+0 |
2022-01-20 | RISC-V: Do not print the SBI version during HSM extension boot print | Atish Patra | 1 | -1/+1 |
2020-10-26 | treewide: Convert macro and uses of __section(foo) to __section("foo") | Joe Perches | 1 | -2/+2 |
2020-05-05 | riscv: force __cpu_up_ variables to put in data section | Zong Li | 1 | -2/+2 |
2020-03-31 | RISC-V: Add supported for ordered booting method using HSM | Atish Patra | 1 | -1/+9 |
2020-03-31 | RISC-V: Add cpu_ops and modify default booting method | Atish Patra | 1 | -0/+38 |