index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
pinetabv-6.6.y-devel
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
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log msg
author
committer
range
path:
root
/
arch
/
riscv
/
include
/
asm
/
vdso.h
Age
Commit message (
Expand
)
Author
Files
Lines
2023-02-01
riscv: alternative: patch alternatives in the vDSO
Jisheng Zhang
1
-0
/
+4
2022-10-26
riscv/vdso: typo therefor
Heinrich Schuchardt
1
-1
/
+1
2022-04-26
riscv: compat: vdso: Add COMPAT_VDSO base code implementation
Guo Ren
1
-0
/
+9
2021-10-27
riscv/vdso: Drop unneeded part due to merge issue
Kefeng Wang
1
-11
/
+0
2021-10-05
riscv/vdso: Add support for time namespaces
Tong Tiangen
1
-1
/
+1
2021-10-02
riscv/vdso: Move vdso data page up front
Tong Tiangen
1
-0
/
+2
2021-10-02
riscv/vdso: Refactor asm/vdso.h
Tong Tiangen
1
-6
/
+10
2021-08-26
RISC-V: Fix VDSO build for !MMU
Palmer Dabbelt
1
-0
/
+9
2021-08-25
riscv: explicitly use symbol offsets for VDSO
Saleem Abdulrasool
1
-12
/
+2
2021-01-13
riscv: Fixup CONFIG_GENERIC_TIME_VSYSCALL
Guo Ren
1
-1
/
+1
2020-06-11
riscv: use vDSO common flow to reduce the latency of the time-related functions
Vincent Chen
1
-0
/
+2
2019-06-19
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234
Thomas Gleixner
1
-12
/
+1
2018-08-20
RISC-V: Define sys_riscv_flush_icache when SMP=n
Palmer Dabbelt
1
-2
/
+0
2017-11-30
RISC-V: Allow userspace to flush the instruction cache
Andrew Waterman
1
-0
/
+4
2017-09-27
RISC-V: User-facing API
Palmer Dabbelt
1
-0
/
+41