starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2024-09-24	Merge tag 'riscv-for-linus-6.12-mw1' of git://git.kernel.org/pub/scm/linux/ke...	Linus Torvalds	1	-0/+5
2024-08-27	irqchip/riscv-intc: Add ACPI support for AIA	Sunil V L	1	-0/+33
2024-08-27	ACPI: RISC-V: Initialize GSI mapping structures	Sunil V L	1	-0/+22
2024-08-07	RISC-V: Enable IPI CPU Backtrace	Ryo Takakura	1	-0/+5
2023-06-10	init: consolidate prototypes in linux/init.h	Arnd Bergmann	1	-2/+0
2023-04-08	irqchip/riscv-intc: Allow drivers to directly discover INTC hwnode	Anup Patel	1	-0/+4
2021-03-10	riscv: irq: Fix no prototype warning	Nanyong Sun	1	-0/+2
2020-06-10	clocksource/drivers/timer-riscv: Use per-CPU timer interrupt	Anup Patel	1	-2/+0
2020-06-10	irqchip: RISC-V per-HART local interrupt controller driver	Anup Patel	1	-2/+0
2020-06-10	RISC-V: self-contained IPI handling routine	Anup Patel	1	-1/+0
2019-10-28	riscv: add missing header file includes	Paul Walmsley	1	-0/+3
2019-06-05	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	Thomas Gleixner	1	-9/+1
2018-08-13	RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.h	Christoph Hellwig	1	-4/+0
2018-08-13	RISC-V: simplify software interrupt / IPI code	Christoph Hellwig	1	-0/+1
2017-09-27	RISC-V: Device, timer, IRQs, and the SBI	Palmer Dabbelt	1	-0/+28