| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2025-01-18 | riscv: hwprobe: Add thead vendor extension probing | Charlie Jenkins | 1 | -2/+3 |
| 2024-10-18 | RISC-V: Detect unaligned vector accesses supported | Jesse Taube | 1 | -1/+1 |
| 2024-08-14 | RISC-V: hwprobe: Add MISALIGNED_PERF key | Evan Green | 1 | -1/+1 |
| 2024-07-26 | RISC-V: Provide the frequency of time CSR via hwprobe | Palmer Dabbelt | 1 | -1/+1 |
| 2024-07-11 | riscv: hwprobe: export highest virtual userspace address | Clément Léger | 1 | -1/+1 |
| 2024-01-03 | RISC-V: hwprobe: Introduce which-cpus flag | Andrew Jones | 1 | -0/+24 |
| 2023-11-03 | RISC-V: hwprobe: Fix vDSO SIGSEGV | Andrew Jones | 1 | -0/+5 |
| 2023-09-21 | RISC-V: hwprobe: Expose Zicboz extension and its block size | Andrew Jones | 1 | -1/+1 |
| 2023-04-19 | RISC-V: hwprobe: Support probing of misaligned access performance | Evan Green | 1 | -1/+1 |
| 2023-04-19 | RISC-V: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_IMA | Evan Green | 1 | -1/+1 |
| 2023-04-19 | RISC-V: Add a syscall for HW probing | Evan Green | 1 | -0/+13 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |