| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2023-01-03 | RISC-V: Add sscofpmf extension support | Atish Patra | 1 | -0/+1 |
| 2023-01-03 | RISC-V: Improve /proc/cpuinfo output for ISA extensions | Atish Patra | 1 | -0/+7 |
| 2023-01-03 | RISC-V: Implement multi-letter ISA extension probing framework | Atish Patra | 1 | -0/+18 |
| 2020-05-05 | RISC-V: Add bitmap reprensenting ISA features common across CPUs | Anup Patel | 1 | -0/+22 |
| 2019-11-12 | riscv: clean up the macro format in each header file | Zong Li | 1 | -3/+4 |
| 2019-06-19 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234 | Thomas Gleixner | 1 | -12/+1 |
| 2017-09-27 | RISC-V: ELF and module implementation | Palmer Dabbelt | 1 | -0/+37 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |