starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2021-05-26	locking/atomic: riscv: move to ARCH_ATOMIC	Mark Rutland	1	-64/+64
2020-07-29	locking/atomic: Move ATOMIC_INIT into linux/types.h	Herbert Xu	1	-2/+0
2019-06-03	locking/atomic, riscv: Use s64 for atomic64	Mark Rutland	1	-21/+23
2019-06-03	locking/atomic, riscv: Fix atomic64_sub_if_positive() offset argument	Mark Rutland	1	-1/+1
2019-05-24	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 36	Thomas Gleixner	1	-5/+1
2018-12-21	riscv, atomic: Add #define's for the atomic_{cmp,}xchg_*() variants	Andrea Parri	1	-0/+9
2018-07-25	locking/atomics: Rework ordering barriers	Mark Rutland	1	-12/+5
2018-06-21	atomics/treewide: Make unconditional inc/dec ops optional	Mark Rutland	1	-76/+0
2018-06-21	atomics/treewide: Make test ops optional	Mark Rutland	1	-46/+0
2018-06-21	atomics/riscv: Define atomic64_fetch_add_unless()	Mark Rutland	1	-6/+2
2018-06-21	atomics/treewide: Make atomic_fetch_add_unless() optional	Mark Rutland	1	-0/+1
2018-06-21	atomics/treewide: Make atomic64_inc_not_zero() optional	Mark Rutland	1	-7/+0
2018-06-21	atomics/treewide: Remove redundant atomic_inc_not_zero() definitions	Mark Rutland	1	-9/+0
2018-06-21	atomics/treewide: Rename __atomic_add_unless() => atomic_fetch_add_unless()	Mark Rutland	1	-2/+2
2018-04-03	riscv/atomic: Strengthen implementations with fences	Andrea Parri	1	-149/+268
2017-11-29	RISC-V: Comment on why {,cmp}xchg is ordered how it is	Palmer Dabbelt	1	-2/+7
2017-11-29	RISC-V: Remove unused arguments from ATOMIC_OP	Palmer Dabbelt	1	-47/+47
2017-09-27	RISC-V: Atomic and Locking Code	Palmer Dabbelt	1	-0/+375