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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
arch
/
mips
/
lantiq
/
irq.c
Age
Commit message (
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)
Author
Files
Lines
2023-07-25
MIPS: Explicitly include correct DT includes
Rob Herring
1
-1
/
+1
2022-06-21
mips: lantiq: Add missing of_node_put() in irq.c
Liang He
1
-0
/
+1
2021-08-12
mips: Bulk conversion to generic_handle_domain_irq()
Marc Zyngier
1
-1
/
+1
2021-01-13
MIPS: lantiq: irq: register the interrupt controllers with irqchip_init
Martin Blumenstingl
1
-5
/
+3
2021-01-07
MIPS: lantiq: Explicitly compare LTQ_EBU_PCC_ISTAT against 0
Nathan Chancellor
1
-1
/
+1
2020-01-06
remove ioremap_nocache and devm_ioremap_nocache
Christoph Hellwig
1
-2
/
+2
2019-07-17
Merge tag 'mips_5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Linus Torvalds
1
-51
/
+126
2019-06-25
MIPS: lantiq: Add SMP support for lantiq interrupt controller
Petr Cvek
1
-24
/
+106
2019-06-25
MIPS: lantiq: Shorten register names, remove unused macros
Petr Cvek
1
-18
/
+16
2019-06-25
MIPS: lantiq: Fix bitfield masking
Petr Cvek
1
-2
/
+3
2019-06-25
MIPS: lantiq: Remove unused macros
Petr Cvek
1
-4
/
+0
2019-06-25
MIPS: lantiq: Fix attributes of of_device_id structure
Petr Cvek
1
-1
/
+1
2019-06-25
MIPS: lantiq: Change variables to the same type as the source
Petr Cvek
1
-10
/
+10
2019-06-25
MIPS: lantiq: Move macro directly to iomem function
Petr Cvek
1
-10
/
+8
2019-06-19
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Thomas Gleixner
1
-3
/
+1
2019-01-08
MIPS: lantiq: Use CP0_LEGACY_COMPARE_IRQ
Hauke Mehrtens
1
-8
/
+1
2019-01-08
MIPS: lantiq: Fix IPI interrupt handling
Hauke Mehrtens
1
-63
/
+5
2017-09-04
MIPS: Use mips_gic_present() in place of gic_present
Paul Burton
1
-4
/
+0
2017-04-13
MIPS: smp-mt: Use CPU interrupt controller IPI IRQ domain support
Paul Burton
1
-52
/
+0
2017-02-13
MIPS: Lantiq: Fix cascaded IRQ setup
Felix Fietkau
1
-21
/
+17
2016-08-03
Merge branch '4.7-fixes' into mips-for-linux-next
Ralf Baechle
1
-1
/
+1
2016-08-03
MIPS: Lantiq: Fix build failure
Sudip Mukherjee
1
-2
/
+2
2016-07-24
MIPS: Lantiq: Register IRQ handler for virtual IRQ number
Hauke Mehrtens
1
-1
/
+1
2016-07-24
MIPS: Lantiq: Use the real EXIN count
John Crispin
1
-3
/
+3
2016-07-24
MIPS: Lantiq: Fix eiu interrupt loading code
John Crispin
1
-9
/
+10
2016-07-24
MIPS: Lantiq: Fix eiu interrupt loading code
John Crispin
1
-9
/
+10
2016-05-13
MIPS: Change my email address
John Crispin
1
-1
/
+1
2015-11-11
MIPS: Lantiq: Fix check for return value of request_mem_region()
Hauke Mehrtens
1
-4
/
+4
2015-08-03
MIPS: Export get_c0_perfcount_int()
Felix Fietkau
1
-0
/
+1
2015-08-03
MIPS: SMP: Don't increment irq_count multiple times for call function IPIs
Alex Smith
1
-1
/
+1
2014-11-24
MIPS: lantiq: move eiu init after irq_domain register
John Crispin
1
-24
/
+24
2014-11-24
MIPS: Add hook to get C0 performance counter interrupt
Andrew Bresticker
1
-1
/
+7
2014-05-24
MIPS: MT: Remove SMTC support
Ralf Baechle
1
-2
/
+2
2013-10-30
MIPS: Panic messages should not end in \n.
Ralf Baechle
1
-1
/
+1
2013-07-15
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
Paul Gortmaker
1
-1
/
+1
2013-02-17
MIPS: lantiq: rework external irq code
John Crispin
1
-32
/
+73
2013-01-31
MIPS: Lantiq: Fix cp0_perfcount_irq mapping
John Crispin
1
-1
/
+1
2012-08-23
MIPS: lantiq: external irq sources are not loaded properly
John Crispin
1
-1
/
+1
2012-08-23
MIPS: lantiq: dont register irq_chip for the irq cascade
John Crispin
1
-0
/
+3
2012-08-23
MIPS: lantiq: timer irq can be different to 7
John Crispin
1
-3
/
+16
2012-08-23
MIPS: lantiq: split up IRQ IM ranges
John Crispin
1
-28
/
+32
2012-05-21
OF: MIPS: lantiq: implement irq_domain support
John Crispin
1
-76
/
+102
2012-05-15
MIPS: lantiq: add ipi handlers to make vsmp work
John Crispin
1
-0
/
+60
2012-05-15
MIPS: lantiq: enable oprofile support on lantiq targets
John Crispin
1
-0
/
+6
2012-05-15
MIPS: lantiq: clear all irqs properly on boot
John Crispin
1
-5
/
+6
2012-01-11
Merge branch 'next/generic' into mips-for-linux-next
Ralf Baechle
1
-1
/
+0
2011-12-08
MIPS: irq: Remove IRQF_DISABLED
Yong Zhang
1
-1
/
+0
2011-12-08
MIPS: Fix up inconsistency in panic() string argument.
Ralf Baechle
1
-6
/
+6
2011-09-21
MIPS: Lantiq: Fix external interrupt sources
John Crispin
1
-4
/
+2
2011-05-19
MIPS: Lantiq: Add initial support for Lantiq SoCs
John Crispin
1
-0
/
+326