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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
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visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
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visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
arch
/
mips
/
kernel
/
pm-cps.c
Age
Commit message (
Expand
)
Author
Files
Lines
2019-10-07
MIPS: barrier: Add __SYNC() infrastructure
Paul Burton
1
-10
/
+10
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Thomas Gleixner
1
-5
/
+1
2018-03-09
MIPS: pm-cps: Block system suspend when a JTAG probe is present
Matt Redfearn
1
-0
/
+31
2017-11-07
Merge branch 'linus' into locking/core, to resolve conflicts
Ingo Molnar
1
-1
/
+1
2017-11-03
Update MIPS email addresses
Paul Burton
1
-1
/
+1
2017-10-25
locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE() patterns ...
Mark Rutland
1
-1
/
+1
2017-08-30
MIPS: CPS: Have asm/mips-cps.h include CM & CPC headers
Paul Burton
1
-2
/
+1
2017-08-30
MIPS: Abstract CPU core & VP(E) ID access through accessor functions
Paul Burton
1
-3
/
+3
2017-08-30
MIPS: CPC: Use BIT/GENMASK for register fields, order & drop shifts
Paul Burton
1
-1
/
+1
2017-08-29
MIPS: CM: Use BIT/GENMASK for register fields, order & drop shifts
Paul Burton
1
-2
/
+2
2017-08-29
MIPS: Declare various variables & functions static
Paul Burton
1
-1
/
+1
2017-06-30
MIPS: pm-cps: Drop manual cache-line alignment of ready_count
Paul Burton
1
-8
/
+1
2016-12-25
cpu/hotplug: Cleanup state names
Thomas Gleixner
1
-1
/
+1
2016-10-05
MIPS: pm-cps: Generate idle state entry code when CPUs are onlined
Paul Burton
1
-26
/
+19
2016-10-04
MIPS: pm-cps: Support CM3 changes to Coherence Enable Register
Matt Redfearn
1
-13
/
+18
2016-10-04
MIPS: pm-cps: Add MIPSr6 CPU support
Matt Redfearn
1
-4
/
+18
2016-10-04
MIPS: pm-cps: Remove selection of sync types
Matt Redfearn
1
-19
/
+0
2016-10-04
MIPS: pm-cps: Use MIPS standard completion barrier
Matt Redfearn
1
-5
/
+5
2016-10-04
MIPS: pm-cps: Use MIPS standard lightweight ordering barrier
Matt Redfearn
1
-7
/
+5
2016-10-04
MIPS: pm-cps: Update comments on barrier instructions
Matt Redfearn
1
-8
/
+8
2016-10-04
MIPS: pm-cps: Change FSB workaround to CPU blacklist
Matt Redfearn
1
-7
/
+2
2016-08-04
tree-wide: replace config_enabled() with IS_ENABLED()
Masahiro Yamada
1
-2
/
+2
2016-05-13
MIPS: pm-cps: Avoid offset overflow on MIPSr6
Markos Chandras
1
-4
/
+11
2016-04-03
MIPS: Fix misspellings in comments.
Adam Buchbinder
1
-1
/
+1
2015-08-26
MIPS: Add cases for CPU_I6400
Markos Chandras
1
-0
/
+2
2014-07-30
MIPS: {pm,smp}-cps: use cpu_vpe_id macro
Paul Burton
1
-1
/
+1
2014-07-30
MIPS: pm-cps: Prevent use of mips_cps_* without CPS SMP
Paul Burton
1
-0
/
+8
2014-06-16
MIPS: pm-cps: convert smp_mb__*()
Paul Burton
1
-2
/
+2
2014-05-28
MIPS: pm-cps: add PM state entry code for CPS systems
Paul Burton
1
-0
/
+716