starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2020-09-21	MIPS: context switch: Use save/restore instead of set/clear for Status.CU2	Huacai Chen	1	-1/+3
2020-05-22	mips: Add MIPS Release 5 support	Serge Semin	1	-4/+4
2019-06-03	sched/core: Provide a pointer to the valid CPU mask	Sebastian Andrzej Siewior	1	-2/+2
2018-11-09	MIPS: Avoid FCSR sanitization when CONFIG_MIPS_FP_SUPPORT=n	Paul Burton	1	-1/+5
2017-01-03	MIPS: Cleanup LLBit handling in switch_to	Paul Burton	1	-6/+12
2016-11-04	MIPS: Fix FCSR Cause bit handling for correct SIGFPE issue	Maciej W. Rozycki	1	-0/+18
2016-05-09	MIPS: Fix watchpoint restoration	James Hogan	1	-1/+1
2015-09-03	MIPS: Tidy up FPU context switching	Paul Burton	1	-17/+4
2015-09-03	MIPS: Get rid of finish_arch_switch().	Ralf Baechle	1	-25/+23
2015-06-10	MIPS: MSA: bugfix - disable MSA correctly for new threads/processes.	Ralf Baechle	1	-1/+1
2015-02-17	MIPS: Make use of the ERETNC instruction on MIPS R6	Markos Chandras	1	-3/+6
2014-08-26	MIPS: COP2: CPP macro safety fixes.	Ralf Baechle	1	-2/+2
2014-03-27	MIPS: Basic MSA context switching support	Paul Burton	1	-5/+17
2014-01-25	MIPS: clean up resume declaration	Paul Burton	1	-4/+12
2013-06-13	MIPS: Move cop2 save/restore to switch_to()	Jayachandran C	1	-1/+18
2013-02-01	MIPS: Whitespace cleanup.	Ralf Baechle	1	-2/+2
2012-07-19	MIPS: Fix race condition with FPU thread task flag during context switch.	Leonid Yegoshin	1	-2/+4
2012-03-28	Disintegrate asm/system.h for MIPS	David Howells	1	-0/+85