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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
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path:
root
/
arch
/
mips
/
include
/
asm
/
stackframe.h
Age
Commit message (
Expand
)
Author
Files
Lines
2024-05-03
MIPS: Take in account load hazards for HI/LO restoring
Siarhei Volkau
1
-8
/
+11
2022-03-01
MIPS: Remove TX39XX support
Thomas Bogendoerfer
1
-3
/
+3
2020-09-21
MIPS: Loongson-3: Enable COP2 usage in kernel
Huacai Chen
1
-3
/
+3
2020-05-22
mips: Add MIPS Release 5 support
Serge Semin
1
-1
/
+1
2018-11-09
MIPS: Avoid using .set mips0 to restore ISA
Paul Burton
1
-1
/
+2
2017-11-01
MIPS: Fix exception entry when CONFIG_EVA enabled
Matt Redfearn
1
-4
/
+4
2017-09-06
MIPS: Add DWARF unwinding to assembly
Corey Minyard
1
-99
/
+132
2017-09-06
MIPS: Make SAVE_SOME more standard
Corey Minyard
1
-14
/
+37
2017-01-03
MIPS: Remove RESTORE_ALL_AND_RET
Paul Burton
1
-8
/
+0
2017-01-03
MIPS: Remove r2_emul_return from struct thread_info
Paul Burton
1
-0
/
+4
2017-01-03
MIPS: Only change $28 to thread_info if coming from user mode
Matt Redfearn
1
-0
/
+7
2016-02-02
MIPS: Fix FPU disable with preemption
James Hogan
1
-2
/
+2
2015-08-03
MIPS: Flush RPS on kernel entry with EVA
James Hogan
1
-0
/
+25
2015-02-17
MIPS: asm: stackframe: Do not preserve the HI/LO registers on MIPS R6
Leonid Yegoshin
1
-4
/
+4
2014-05-24
MIPS: MT: Remove SMTC support
Ralf Baechle
1
-195
/
+1
2014-03-31
MIPS: Fix gigaton of warning building with microMIPS.
Ralf Baechle
1
-1
/
+1
2013-10-30
MIPS: Move definition of SMP processor id register to header file
Jayachandran C
1
-18
/
+6
2013-07-01
MIPS: Don't save/restore OCTEON wide multiplier state on syscalls.
David Daney
1
-15
/
+14
2013-05-09
MIPS: microMIPS: Add support for exception handling.
Steven J. Hill
1
-6
/
+6
2013-02-01
MIPS: Whitespace cleanup.
Ralf Baechle
1
-7
/
+7
2011-09-21
MIPS: Don't clobber CP0_STATUS value for CONFIG_MIPS_MT_SMTC
David Daney
1
-2
/
+2
2011-03-31
Fix common misspellings
Lucas De Marchi
1
-1
/
+1
2010-04-30
MIPS: Loongson-2F: Use CONFIG_CPU_JUMP_WORKAROUNDS to control workarounds.
Wu Zhangjin
1
-1
/
+1
2010-04-12
MIPS: Loongson-2F: Flush the branch target history in BTB and RAS
Wu Zhangjin
1
-0
/
+19
2009-12-17
MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.
David Daney
1
-10
/
+10
2009-12-17
MIPS: Reorder operations in stackframe.h for better scheduling
David Daney
1
-8
/
+12
2009-01-11
MIPS: Cavium OCTEON multiplier state preservation.
David Daney
1
-0
/
+17
2008-10-11
MIPS: Move headfiles to new location below arch/mips/include
Ralf Baechle
1
-0
/
+574