| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2019-06-19 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 | Thomas Gleixner | 1 | -3/+1 |
| 2017-09-04 | MIPS: lantiq: remove ltq_reset_cause() and ltq_boot_select() | Hauke Mehrtens | 1 | -2/+0 |
| 2016-05-13 | MIPS: Change my email address | John Crispin | 1 | -1/+1 |
| 2014-11-24 | MIPS: lantiq: export soc type | John Crispin | 1 | -0/+2 |
| 2013-02-17 | MIPS: lantiq: rework external irq code | John Crispin | 1 | -0/+1 |
| 2013-02-17 | MIPS: lantiq: adds static clock for PP32 | John Crispin | 1 | -0/+1 |
| 2012-05-26 | MIPS: lantiq: remove orphaned code | John Crispin | 1 | -5/+0 |
| 2012-05-21 | watchdog: MIPS: lantiq: implement OF support and minor fixes | John Crispin | 1 | -1/+0 |
| 2012-05-21 | MIPS: lantiq: implement support for clkdev api | John Crispin | 1 | -15/+12 |
| 2012-05-15 | MIPS: lantiq: cleanup reset code | John Crispin | 1 | -1/+2 |
| 2011-05-19 | MIPS: Lantiq: Add initial support for Lantiq SoCs | John Crispin | 1 | -0/+63 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |