| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2023-06-09 | mips: ingenic: Enable EXT/2 divider on JZ4750/55/60 if EXT is 24 MHz | Paul Cercueil | 1 | -0/+57 |
| 2023-06-09 | mips: ingenic: Remove useless __maybe_unused | Paul Cercueil | 1 | -2/+2 |
| 2022-05-18 | mips: ingenic: Do not manually reference the CPU clock | Aidan MacDonald | 1 | -26/+0 |
| 2021-08-29 | MIPS: ingenic: Unconditionally enable clock of CPU #0 | Paul Cercueil | 1 | -0/+28 |
| 2021-07-19 | MIPS: Ingenic: Add system type for new Ingenic SoCs. | 周琰杰 (Zhou Yanjie) | 1 | -0/+21 |
| 2020-09-27 | MIPS: Ingenic: Add system type for new Ingenic SoCs. | 周琰杰 (Zhou Yanjie) | 1 | -0/+12 |
| 2020-09-18 | MIPS: generic: Add support for Ingenic SoCs | Paul Cercueil | 1 | -0/+108 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |