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path: root/arch/mips/boot/dts/realtek/rtl930x.dtsi
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2025-04-27mips: dts: realtek: Add MDIO controllerChris Packham1-0/+33
Add a device tree node for the MDIO controller on the RTL9300 chips. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2025-02-21mips: dts: realtek: Clean up CPU clocksSander Vanheule1-2/+1
The referenced CPU clock does not require any additional #clock-cells, so drop the extraneous '0' in the referenced CPU clock. The binding for MIPS cpus also does not allow for the clock-names property, so just drop it. This resolves some error message from 'dtbs_check': cpu@0: clocks: [[4], [0]] is too long 'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Sander Vanheule <sander@svanheule.net> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # For RTL9302C Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2025-02-21mips: dts: realtek: Decouple RTL930x base DTSISander Vanheule1-50/+83
The RTL930x SoC series is sufficiently different to warrant its own base dtsi. This ensures no properties need to be deleted or overwritten, and prevents accidental inclusions of updates from rtl83xx.dtsi. Signed-off-by: Sander Vanheule <sander@svanheule.net> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz> # For RTL9302C Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-11-21mips: dts: realtek: Add SPI NAND controllerChris Packham1-0/+13
Add the SPI-NAND controller on the RTL9300 family of devices. This supports serial/dual/quad data width and DMA for read/program operations. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-11-12mips: dts: realtek: Add I2C controllersChris Packham1-0/+16
Add the I2C controllers that are part of the RTL9300 SoC. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-11-12mips: dts: realtek: Add syscon-reboot nodeChris Packham1-0/+13
The board level reset on systems using the RTL9302 can be driven via the switch. Use a syscon-reboot node to represent this. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-07-12mips: dts: realtek: Add RTL9302C boardChris Packham1-0/+79
Add support for the RTL9302 SoC and the RTL9302C_2xRTL8224_2XGE reference board. The RTL930x family of SoCs are Realtek switches with an embedded MIPS core (800MHz 34Kc). Most of the peripherals are similar to the RTL838x SoC and can make use of many existing drivers. Add in full DSA switch support is still a work in progress. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>