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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
arch
/
mips
/
ar7
/
gpio.c
Age
Commit message (
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)
Author
Files
Lines
2020-11-06
mips: ar7: add missing iounmap() on error in ar7_gpio_init
Qinglang Miao
1
-0
/
+1
2020-01-06
remove ioremap_nocache and devm_ioremap_nocache
Christoph Hellwig
1
-1
/
+1
2019-05-24
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 102
Thomas Gleixner
1
-14
/
+1
2017-02-14
MIPS: Audit and remove any unnecessary uses of module.h
Paul Gortmaker
1
-1
/
+2
2016-02-19
MIPS: ar7: use gpiochip data pointer
Linus Walleij
1
-17
/
+9
2016-01-24
MIPS: ar7: Be sure to clamp return value
Linus Walleij
1
-1
/
+1
2015-09-03
MIPS: Remove all the uses of custom gpio.h
Alban Bedel
1
-1
/
+4
2011-12-08
MIPS: AR7: constify some arrays in gpio and prom code
Florian Fainelli
1
-1
/
+1
2011-05-18
MIPS: AR7: Fix GPIO register size for Titan variant.
Florian Fainelli
1
-3
/
+1
2010-10-29
MIPS: AR7: Add support for Titan (TNETV10xx) SoC variant
Florian Fainelli
1
-10
/
+230
2010-10-29
MIPS: AR7: Initialize GPIO earlier
Florian Fainelli
1
-2
/
+1
2010-02-27
MIPS: AR7: Whitespace hacking
Alexander Clouter
1
-3
/
+3
2010-02-27
MIPS: AR7: Implement gpiolib
Florian Fainelli
1
-15
/
+98
2009-07-03
MIPS: Add support for Texas Instruments AR7 System-on-a-Chip
Florian Fainelli
1
-0
/
+48