starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2019-07-12	arm64: switch to generic version of pte allocation	Mike Rapoport	1	-39/+8
2019-06-19	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234	Thomas Gleixner	1	-12/+1
2019-04-09	arm64: mm: enable per pmd page table lock	Yu Zhao	1	-1/+11
2019-01-05	mm: treewide: remove unused address argument from pte_alloc functions	Joel Fernandes (Google)	1	-2/+2
2018-02-16	arm64: mm: Use READ_ONCE/WRITE_ONCE when accessing page tables	Will Deacon	1	-22/+22
2017-12-22	arm64: handle 52-bit physical addresses in page table entries	Kristina Martsenko	1	-3/+3
2017-11-16	kmemcheck: stop using GFP_NOTRACK and SLAB_NOTRACK	Levin, Alexander (Sasha Levin)	1	-1/+1
2016-06-25	arm64: get rid of superfluous __GFP_REPEAT	Michal Hocko	1	-1/+1
2016-02-16	arm64: mm: add __{pud,pgd}_populate	Mark Rutland	1	-4/+22
2015-10-12	arm64: move PGD_SIZE definition to pgalloc.h	Andrey Ryabinin	1	-0/+1
2015-04-15	arm64: expose number of page table levels on Kconfig level	Kirill A. Shutemov	1	-4/+4
2014-11-20	arm64: pgalloc: consistently use PGALLOC_GFP	Mark Rutland	1	-4/+4
2014-07-23	arm64: Convert bool ARM64_x_LEVELS to int ARM64_PGTABLE_LEVELS	Catalin Marinas	1	-4/+4
2014-07-23	arm64: mm: Implement 4 levels of translation tables	Jungseok Lee	1	-0/+20
2014-07-23	arm64: Introduce VA_BITS and translation level options	Jungseok Lee	1	-2/+2
2013-11-15	arm64: handle pgtable_page_ctor() fail	Kirill A. Shutemov	1	-3/+6
2012-09-17	arm64: MMU fault handling and page table management	Catalin Marinas	1	-0/+113