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path: root/arch/arm64/include/asm/mmu_context.h
AgeCommit message (Expand)AuthorFilesLines
2024-09-04arm64: implement PKEYS supportJoey Gouly1-1/+45
2024-06-24arm64: Cleanup __cpu_set_tcr_t0sz()Seongsu Park1-2/+2
2024-03-13Revert "arm64: mm: add support for WXN memory translation attribute"Catalin Marinas1-29/+1
2024-02-16arm64: mm: add support for WXN memory translation attributeArd Biesheuvel1-1/+29
2024-02-16arm64: Revert "mm: provide idmap pointer to cpu_replace_ttbr1()"Ard Biesheuvel1-11/+6
2024-02-16arm64: kernel: Create initial ID map from C codeArd Biesheuvel1-4/+2
2024-02-16arm64: mmu: Make __cpu_replace_ttbr1() out of lineArd Biesheuvel1-31/+1
2023-10-16arm64: Avoid cpus_have_const_cap() for ARM64_HAS_CNPMark Rutland1-11/+17
2023-06-23Merge branches 'for-next/kpti', 'for-next/missing-proto-warn', 'for-next/iss2...Catalin Marinas1-3/+7
2023-06-15arm64/mm: remove now-superfluous ISBs from TTBR writesJamie Iles1-2/+6
2023-06-07arm64: standardise cpucap bitmap namesMark Rutland1-1/+1
2023-03-16mm: Expose untagging mask in /proc/$PID/statusKirill A. Shutemov1-0/+6
2022-11-25arm64/kpti: Move DAIF masking to C codeMark Brown1-0/+10
2022-09-26treewide: Drop function_nocfiSami Tolvanen1-1/+1
2022-09-26arm64: Drop unneeded __nocfi attributesSami Tolvanen1-1/+1
2022-06-24arm64: mm: provide idmap pointer to cpu_replace_ttbr1()Ard Biesheuvel1-4/+9
2022-06-24arm64: head: drop idmap_ptrs_per_pgdArd Biesheuvel1-1/+0
2022-06-24arm64: head: move assignment of idmap_t0sz to C codeArd Biesheuvel1-1/+1
2021-10-01arm64: hibernate: abstract ttrb0 setup functionPasha Tatashin1-0/+24
2021-08-20arm64: Implement task_cpu_possible_mask()Will Deacon1-0/+13
2021-06-15arm64/mm: Fix ttbr0 values stored in struct thread_info for software-panAnshuman Khandual1-2/+2
2021-04-09arm64: add __nocfi to functions that jump to a physical addressSami Tolvanen1-1/+1
2021-04-09arm64: use function_nocfi with __pa_symbolSami Tolvanen1-1/+1
2021-03-11arm64: mm: remove unused __cpu_uses_extended_idmap[_level()]Ard Biesheuvel1-14/+0
2021-03-11arm64: mm: use a 48-bit ID map when possible on 52-bit VA buildsArd Biesheuvel1-4/+1
2021-01-27arm64: mm: Always update TCR_EL1 from __cpu_set_tcr_t0sz()James Morse1-4/+3
2020-12-16Merge tag 'asm-generic-mmu-context-5.11' of git://git.kernel.org/pub/scm/linu...Linus Torvalds1-4/+4
2020-11-10arm64: consistently use reserved_pg_dirMark Rutland1-3/+3
2020-10-27arm64: use asm-generic/mmu_context.h for no-op implementationsNicholas Piggin1-4/+4
2020-09-29arm64: mm: Pin down ASIDs for sharing mm with devicesJean-Philippe Brucker1-1/+10
2020-07-30arm64/mm: save memory access in check_and_switch_context() fast switch pathPingfan Liu1-4/+2
2020-06-09mm: reorder includes after introduction of linux/pgtable.hMike Rapoport1-1/+1
2020-06-09mm: introduce include/linux/pgtable.hMike Rapoport1-1/+1
2020-02-27arm64: mm: convert cpu_do_switch_mm() to CMark Rutland1-0/+2
2019-08-09arm64: mm: Introduce 52-bit Kernel VAsSteve Capper1-1/+1
2019-08-09arm64: mm: Introduce vabits_actualSteve Capper1-1/+1
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner1-12/+1
2018-12-10arm64: Kconfig: Re-jig CONFIG options for 52-bit VAWill Deacon1-1/+1
2018-12-10arm64: mm: introduce 52-bit userspace supportSteve Capper1-0/+3
2018-11-20arm64: mm: apply r/o permissions of VM areas to its linear alias as wellArd Biesheuvel1-0/+2
2018-09-18arm64: mm: Support Common Not Private translationsVladimir Murzin1-2/+15
2018-02-16arm64: mm: Use READ_ONCE/WRITE_ONCE when accessing page tablesWill Deacon1-2/+2
2018-01-16arm64: kpti: Fix the interaction between ASID switching and software PANCatalin Marinas1-1/+2
2018-01-15arm64: fix ID map extension to 52 bitsKristina Martsenko1-3/+2
2017-12-22Merge branch 'for-next/52-bit-pa' into for-next/coreCatalin Marinas1-1/+11
2017-12-22arm64: allow ID map to be extended to 52 bitsKristina Martsenko1-0/+10
2017-12-22arm64: handle 52-bit addresses in TTBRKristina Martsenko1-1/+1
2017-12-11arm64: mm: Remove pre_ttbr0_update_workaround for Falkor erratum #E1003Will Deacon1-2/+0
2017-12-11arm64: mm: Move ASID from TTBR0 to TTBR1Will Deacon1-0/+7
2017-12-06arm64: SW PAN: Update saved ttbr0 value on enter_lazy_tlbWill Deacon1-14/+10
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