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2024-10-02arm64: zynqmp: Expose AMS to userspace as HWMONSean Anderson1-14/+0
Expose the AMS to userspace, allowing monitoring of internal voltages and temperatures. For compatibility, we keep the node name the same as on the SM-K26, and we keep the ZCU100 Rev C. around (since it is named differently). Signed-off-by: Sean Anderson <sean.anderson@linux.dev> Link: https://lore.kernel.org/r/20240812215129.3599832-3-sean.anderson@linux.dev Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-10-02arm64: zynqmp: Enable AMS for all boardsSean Anderson1-4/+0
The AMS does not rely on external hardware or features, so it can be enabled unconditionally. Signed-off-by: Sean Anderson <sean.anderson@linux.dev> Link: https://lore.kernel.org/r/20240812215129.3599832-2-sean.anderson@linux.dev Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-06-17arm64: zynqmp: Add pwm-fan node and fix ttc0 pwm-cells propertyVishal Patel1-0/+11
Add pwm-fan node to control fan through hwmon and change pwm-cells property to 3 to allow fancontrol utility to function correctly. Signed-off-by: Vishal Patel <vishal.patel@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ff6b4dbfc9bb1b53769ffbf7d0e932c7a8be7c08.1716802450.git.michal.simek@amd.com
2024-06-17arm64: zynqmp: Add support for K26 rev2 boardsMichal Simek1-3/+5
Revision 2 is SW compatible with revision 1 but it is necessary to reflect it in model and compatible properties which are parsed by user space. Rev 2 has improved a power on boot reset and MIO34 shutdown glich improvement done via an additional filter in the GreenPak chip. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/458698666fdfcaaac70967d9f755422a480bed99.1716802450.git.michal.simek@amd.com
2023-12-13arm64: xilinx: Remove address/size-cells from flash nodeMichal Simek1-2/+0
Partitions are described via fixed-partitions that's why there is no need to have address/size-cells in flash node. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c4447028f914e77b8c28640dc458b8409198ee30.1695040866.git.michal.simek@amd.com
2023-12-13arm64: xilinx: Remove mt25qu512a compatible string from SOMMichal Simek1-1/+1
mt25qu512a is not documented in DT binding that's why remove it. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a1e975f5785dfb6eb04e8d5905dcaa7467ccd585.1695040866.git.michal.simek@amd.com
2023-12-13arm64: xilinx: Use lower case for partition addressMichal Simek1-2/+2
Lower case should be used for register address. Issue is reported as: flash@0: partitions: Unevaluated properties are not allowed ('partition@22A0000' was unexpected) Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a96ac9a32a363b04958157548f290d480c21590c.1695040866.git.michal.simek@amd.com
2023-07-10arm64: zynqmp: Add memory reserved node for k26 Kria SOM boardSharath Kumar Dasari1-0/+11
PMUFW (Power Management Unit firmware) requires top 1MB of the lower DDR memory reserved for its operation, this is missing in k26 SM static dts file. Bootloader or kernel shouldn't access this location. Signed-off-by: Sharath Kumar Dasari <sharath.kumar.dasari@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/8ddc7fb4bf40faead7a015ad7e095f3f7d2ec191.1686555698.git.michal.simek@amd.com
2023-07-10arm64: zynqmp: Fix open drain warning on ZynqMPManikanta Guntupalli1-2/+2
Mark both GPIO lines as GPIO_OPEN_DRAIN which is required by i2c-gpio DT binding. Similar change was done by commit 8df80c1801c9 ("ARM: dts: exynos: Convert to new i2c-gpio bindings"). Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a0faf488dde310e1c1c1a676c371e223db6bdca6.1686227712.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Used fixed-partitions for QSPI in k26Michal Simek1-81/+88
Using fixed partitions is recommended way how to describe QSPI. Also add label for qspi flash memory to be able to reference it in future. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/7368dc772d8dc29477a880ac2065e2ecb98cf3f5.1684767562.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Set qspi tx-buswidth to 4Amit Kumar Mahapatra1-1/+1
All ZynqMP boards are setting up tx-buswidth to 1. Due to this the framework only issues 1-1-1 write commands to the GQSPI driver. But the GQSPI controller is capable of handling 1-4-4 write commands, so updated the tx-buswidth to 4. Using all 4 lines will increase the tx data transfer rate, as now the tx data will be transferred on four lines instead on single line. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1f1b0028106d83aa06e0777e91862a07df100fa1.1684767562.git.michal.simek@amd.com
2023-06-05arm64: zynqmp: Switch to amd.com emailsMichal Simek1-1/+1
Update my and DPs email address to match current setup. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/108cbbbab29e13d386d38a779fd582f10844a030.1685443337.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Add phase tags markingMichal Simek1-0/+3
bootph-all as phase tag was added to dt-schema (dtschema/schemas/bootph.yaml) to cover U-Boot challenges with DT. That's why add it also to Linux to be aligned with bootloader requirement. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/48b554aef75d11e6ad2ef7d21f22accb35432112.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Enable AMS on SOM and other zcu10x boardsMichal Simek1-0/+26
AMS is used for monitoring system. Used for measuring voltages and especially temperatures. Origin interface is IIO but via iio-hwmon it can be moved to hwmon framework too (done for SOM and zcu100). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e1e1621ac1cee7f36ef20606bb3795e130de9609.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Add pinctrl emmc description to SM-K26Michal Simek1-0/+20
Production SOM has emmc on it and make sense to describe pin description to be able use EMMC if it is not configured via psu_init. (Still some regs are not handled but this is one step in that direction) Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f61c16e2fd7c91c2be6d6b67c902037580dbd364.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Add gpio labels for modepin gpioMichal Simek1-0/+4
Using label helps with better chip identification. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/12b2fcd94e528c8ca7117f6741aae36b5942b430.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Add mtd partition for secure OS storage areaAmit Kumar Mahapatra1-4/+8
Update MTD partitions of Kria device trees to allocate 128KB of QSPI memory for secure OS. Increased "SHA256" partition size & changed starting address of "User" partition to accommodate the new partition "Secure OS Storage" Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20dd23821118999c6fec2bad52ea446d1a66fefb.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Use assigned-clock-rates for setting up SD clock in SOMMichal Simek1-0/+1
With limited low level configuration done via psu-init only IPs connected on SOM are initialized and configured. All IPs connected to carrier card are not initialized. There is a need to do proper reset, pin configuration and also clock setting. The patch targets the last part which is setting up proper clock for EMMC on production SOMs and SD on kv260-revB. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/cf5a4e412e1674500a71a0b1eed7fa8393f37ae9.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Add linux,code for gpio buttonSrinivas Neeli1-0/+3
BTN_MISC looks like the most reasonable option for this button. Button is used by firmware to indicate (after reset, power up) that user wants to do firmware upgrade via firmware update utility. For bootloader or OS is this just user button which is worth to have it mapped. Also button can be used as a wakeup source and pressing it for more time can generate more chars that's why also adding wakeup-source and autorepeat properties. Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/4e20661f43b1fb8432fa5fcda5c1cb50d0a27475.1683034376.git.michal.simek@amd.com
2023-05-16arm64: zynqmp: Add dmas, dp, rtc, watchdogs and opp nodes for SOMMichal Simek1-0/+95
There are couple of IPs which are enabled in origin HW design which are missing in SOM dt. Add them to match default setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/5d3777fdf91d114effe1921255a7ad71ef30d277.1683034376.git.michal.simek@amd.com
2023-05-12arm64: zynqmp: Add mali-400 gpu node for zynqmpParth Gajjar1-0/+4
Add mali-400 gpu node for zynqmp. Enabled gpu node for xilinx boards. Signed-off-by: Parth Gajjar <parth.gajjar@amd.com> Signed-off-by: Vishal Sagar <vishal.sagar@amd.com> Link: https://lore.kernel.org/r/20230321070619.29440-3-parth.gajjar@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-23arm64: dts: xilinx: align gpio-key node names with dtschemaKrzysztof Kozlowski1-1/+1
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-30-krzysztof.kozlowski@linaro.org Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-23arm64: zynqmp: Fix comment about number of gpio line namesMichal Simek1-1/+1
ZynqMP has 174 gpio lines connected to PS controller but DT is describing them from 0 to 173 not 174. Fixes: 7a4c31ee877a ("arm64: zynqmp: Add support for Xilinx Kria SOM board") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/c3480ba47ac9761903485ebfac127f297053d4da.1634289461.git.michal.simek@xilinx.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2021-09-29arm64: zynqmp: Add support for Xilinx Kria SOM boardMichal Simek1-0/+289
There are couple of revisions of SOMs (k26) and associated carrier cards (kv260). SOM itself has two major versions: sm-k26 - SOM with EMMC smk-k26 - SOM without EMMC used on starter kit with preprogrammed firmware in QSPI. SOMs are describing only devices available on the SOM or connections which are described in specification (for example UART, fwuen). When SOM boots out of QSPI it uses limited number of peripherals defined by the specification and present in sm(k)-k26 dtses. Then a carrier card (CC) detection is happening and DT overlay is applied to brings new functionality. That's why DT overlays are used. The name is composed together with SOM name and CC name that's why DT overlays with these names are generated to make sure they can be used together. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1ba32590670434b650bacf6410a65579dd30b38b.1632294439.git.michal.simek@xilinx.com
generated by cgit v1.2.3 (git 2.39.0) at 2025-08-28 06:13:11 +0300