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2022-06-20arm64: dts: hisilicon: correct gpio-keys propertiesKrzysztof Kozlowski1-2/+0
gpio-keys children do not use unit addresses. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-10-krzysztof.kozlowski@linaro.org
2022-06-20arm64: dts: hisilicon: align gpio-key node names with dtschemaKrzysztof Kozlowski2-3/+3
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-9-krzysztof.kozlowski@linaro.org
2022-06-16arm64: dts: hisilicon: adjust whitespace around '='Krzysztof Kozlowski6-23/+23
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220526204453.832681-1-krzysztof.kozlowski@linaro.org
2022-04-19arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFSKrzysztof Kozlowski2-4/+4
The DT schema expects 'freq-table-hz' property to be an uint32-matrix, which is also easier to read. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220306111125.116455-10-krzysztof.kozlowski@canonical.com
2021-09-22arm64: dts: hisilicon: align operating-points table name with dtschemaKrzysztof Kozlowski2-3/+3
Align the name of operating-points node to dtschema to fix warnings like: cpu_opp_table: $nodename:0: 'cpu_opp_table' does not match '^opp-table(-[a-z0-9]+)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-09-18arm64: dts: hisilicon: fix arm,sp805 compatible stringMichael Walle2-3/+3
According to Documentation/devicetree/bindings/watchdog/arm,sp805.yaml the compatible is: compatible = "arm,sp805", "arm,primecell"; The current compatible string doesn't exist at all. Fix it. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-09-18arm64: dts: hisilicon: Add support for Hikey 970 PMICMauro Carvalho Chehab3-20/+90
Add a device tree for the HiSilicon 6421v600 SPMI PMIC, used on HiKey970 board. As we now have support for it, change the fixed regulators used by the SD I/O to use the proper LDO supplies. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-08-13arm64: dts: HiSilicon: hi3660: address a PCI warningMauro Carvalho Chehab1-1/+1
When the driver is registered, it produces a warning when registering the PCI bridge: [ 5.363450] pci_bus 0000:00: root bus resource [bus 00-01] [ 5.396998] pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under [bus 00-01] (conflicts with (null) [bus 00-01]) [ 5.284831] pci 0000:00:00.0: PCI bridge to [bus 01-ff] The reason is that the bus-range is wrong. Address it. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-06-17arm64: dts: hisilicon: use the correct HiSilicon copyrightHao Fang14-14/+14
s/Hisilicon/HiSilicon/. It should use capital S, according to the official website https://www.hisilicon.com/en. Signed-off-by: Hao Fang <fanghao11@huawei.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: hi3670.dtsi: add I2C settingsMauro Carvalho Chehab1-0/+71
The I2C buses are not declared at the device tree. As this will be needed by further patches, add them, keeping all in disabled state. Per-board settings can override it. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settingsMauro Carvalho Chehab1-11/+621
There are several pinctrl settings that are missing at this DT file. Also, the entries are out of order. Add the missing bits, as they'll be required by the DRM driver - and probably by other drivers not upstreamed yet. Reorder the entres, adding the missing bits. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rstMauro Carvalho Chehab1-0/+6
This is required in order to support USB. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: delete unused property smmu-cb-memtypeZhen Lei2-6/+0
The "smmu-cb-memtype" is a private property developed by the Hisilicon driver in the early stage and is not used now. So delete it. Otherwise, below YAML check warnings are reported: arch/arm64/boot/dts/hisilicon/hip06-d03.dt.yaml: iommu@a0040000: \ 'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/hisilicon/hip07-d05.dt.yaml: iommu@a0040000: \ 'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as ↵Zhen Lei1-2/+2
PHY nodes Currently, the names of several nodes incorrectly match common PHY provider schema. And the phy-provider.yaml requires them must have property "#phy-cells". As a result, false positives similar to the following are reported: usb2-phy@120: '#phy-cells' is a required property Change their names slightly so that they do not match pattern: "^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$". Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: normalize the node name of the localbusZhen Lei1-1/+1
Change the node name of the localbus to match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'. This error is detected by simple-bus.yaml. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: normalize the node name of the module thermalZhen Lei2-6/+6
1. Change the node name of the thermal zone to match '^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', add suffix "-thermal". 2. Change the node name of the trip point to match '^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', delete character "@". Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: place clock-names "bus" before "core"Zhen Lei1-1/+1
Look at the clock-names schema defined in arm,mali-utgard.yaml: clock-names: items: - const: bus - const: core The "bus" needs to be placed before the "core". Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: separate each group of data in the property "ranges"Zhen Lei3-7/+6
Do not write the "ranges" of multiple groups of data into a uint32 array, use <> to separate them. Otherwise, the errors similar to the following will be reported: soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \ 100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not valid under \ any of the given schemas (Possible causes of the failure): soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \ 100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not of type 'boolean' soc: pcie@a0090000:ranges:0: [33554432, 0, 2986344448, 0, 2986344448, 0, \ 100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536] is too long Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24arm64: dts: hisilicon: Use generic "ngpios" rather than "snps,nr-gpios"Jisheng Zhang1-2/+2
This is to remove similar errors as below: OF: /.../gpio-port@0: could not find phandle Commit 7569486d79ae ("gpio: dwapb: Add ngpios DT-property support") explained the reason of above errors well and added the generic "ngpios" property, let's use it. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24arm64: dts: hi3660: Harmonize DWC USB3 DT nodes nameSerge Semin1-1/+1
In accordance with the DWC USB3 bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24arm64: dts: hisilicon: list all clocks required by snps-dw-apb-uart.yamlZhen Lei1-4/+4
The snps,dw-apb-uart binding need to specify two clocks: "baudclk", "apb_pclk". But only "apb_pclk" is specified now. Because the driver preferentially matches the first clock. Otherwise, it matches the second clock instead of both clocks. So both of them use the same clock don't change the function. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24arm64: dts: hisilicon: list all clocks required by pl011.yamlZhen Lei1-4/+4
The arm,pl011 binding need to specify two clocks: "uartclk", "apb_pclk". But only "apb_pclk" is specified now. Because the driver preferentially matches the first clock. Otherwise, it matches the second clock instead of both clocks. So both of them use the same clock don't change the function. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24arm64: dts: hisilicon: list all clocks required by spi-pl022.yamlZhen Lei3-8/+8
The arm,pl022 binding need to specify two clocks: "sspclk", "apb_pclk". But only "apb_pclk" is specified now. Because the driver preferentially matches the first clock. Otherwise, it matches the second clock instead of both clocks. So both of them use the same clock don't change the function. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24arm64: dts: hisilicon: normalize the node name of the UART devicesZhen Lei2-3/+3
Change the node name of the UART devices to match "^serial(@[0-9a-f,]+)*$". Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24arm64: dts: hisilicon: normalize the node name of the usb devicesZhen Lei3-6/+6
Change the node name of the usb devices to match "^usb(@.*)?". These errors are detected by generic-ehci.yaml and generic-ohci.yaml. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24arm64: dts: hisilicon: normalize the node name of the SMMU devicesZhen Lei2-6/+6
Change the node name of the SMMU devices to match "^iommu@[0-9a-f]*". Otherwise, the errors similar to the following will be reported by arm,smmu-v3.yaml. smmu_pcie: $nodename:0: 'smmu_pcie' does not match '^iommu@[0-9a-f]*' Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24arm64: dts: hisilicon: place clock-names "biu" before "ciu"Zhen Lei1-1/+1
Look at the clock-names schema defined in synopsys-dw-mshc.yaml: clock-names: items: - const: biu - const: ciu The "biu" needs to be placed before the "ciu". Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24arm64: dts: hisilicon: remove unused property pinctrl-namesZhen Lei1-2/+0
uart1 and uart5 are not used as pinctrl, so the property "pinctrl-names" can be deleted. In fact, the property "pinctrl-names" depends on the property "pinctrl-0". So the errors similar to the following will be reported by pinctrl-consumer.yaml. serial@fdf00000: 'pinctrl-0' is a dependency of 'pinctrl-names' Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24arm64: dts: hisilicon: write the values of property-units into a uint32 arrayZhen Lei3-7/+8
Use <> to separate the values of property-units will be treated as multiple arrays. The errors similar to the following will be reported by property-units.yaml. ufs@ff3c0000: freq-table-hz: [[0, 0], [0, 0]] is too long Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24arm64: dts: hisilicon: separate each group of data in the property "reg"Zhen Lei2-76/+76
Do not write the "reg" of multiple groups of data into a uint32 array, use <> to separate them. Otherwise, the errors similar to the following will be reported by reg.yaml. soc: dsa@c7000000:reg:0: [0, 3305111552, 0, 8978432, 0, 3338665984, 0, \ 6291456] is too long Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-11-24arm64: dts: hisilicon: normalize the node name of the ITS devicesZhen Lei3-13/+13
Change the node name of the ITS devices to match "^(msi-controller|gic-its|interrupt-controller)@[0-9a-f]+$". Although "interrupt-controller" is allowed, but "msi-controller" is preferred. Otherwise, "interrupt-controller@b7000000: False schema does not allow" will be reported by arm,gic-v3.yaml. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-09-14arm64: dts: hisilicon: Fix SP805 clocksAndre Przywara2-6/+9
The SP805 DT binding requires two clocks to be specified, but Hisilicon platform DTs currently only specify one clock. In practice, Linux would pick a clock named "apb_pclk" for the bus clock, and the Linux and U-Boot SP805 driver would use the first clock to derive the actual watchdog counter frequency. Since currently both are the very same clock, we can just double the clock reference, and add the correct clock-names, to match the binding. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-09-14arm64: dts: hisilicon: replace status value "ok" by "okay"Adrian Schmutzler7-36/+36
While the DT parser recognizes "ok" as a valid value for the "status" property, it is actually mentioned nowhere. Use the proper value "okay" instead, as done in the majority of files already. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-07-17arm64: dts: hisilicon: hikey: fixes to comply with adi, adv7533 DT bindingRicardo Cañuelo2-1/+12
hi3660-hikey960.dts: Define a 'ports' node for 'adv7533: adv7533@39' and the 'adi,dsi-lanes' property to make it compliant with the adi,adv7533 DT binding. This fills the requirements to meet the binding requirements, remote endpoints are not defined. hi6220-hikey.dts: Change property name s/pd-gpio/pd-gpios, gpio properties should be plural. This is just a cosmetic change. Signed-off-by: Ricardo Cañuelo <ricardo.canuelo@collabora.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-07-17dts: hi3660: Add support for basic usb gadget on Hikey960John Stultz2-0/+106
This patch adds basic core dwc3, usb phy and rt1711h nodes for usb support on Hikey960. This does not enable the mux/hub functionality on the board, so the USB-A host ports will not function, but does allow the USB-C port to function in gadget mode (unfortunately not in host, as the hub/mux functionality is needed to enable vbus output to power devices in host mode). This is based on an old patch originally by Yu Chen. Cc: Yu Chen <chenyu56@huawei.com> Cc: Chunfeng Yun <chunfeng.yun@mediatek.com> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Binghui Wang <wangbinghui@hisilicon.com> Cc: YongQin Liu <yongqin.liu@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-07-17arm64: dts: hisilicon: Align UART nodename with dtschemaKrzysztof Kozlowski1-5/+5
Fix dtschema validator warnings like: uart@f8015000: $nodename:0: 'uart@f8015000' does not match '^serial(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-07-17arm64: dts: hisilicon: Use phandles for overriding nodes in hi6220Krzysztof Kozlowski1-216/+210
When overriding nodes, usage of phandles instead of full paths reduces possible mistakes (e.g. in duplicated unit address) and removes duplicate data. The UART nodes were extended via full path and phandle which makes it difficult to review and spot actual differences. No functional change (no difference in dtx_diff). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-05-07arm64: dts: hi6220: Add CTI optionsMike Leach1-8/+122
Adds in CTI device tree information for the Hikey620 board. Signed-off-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-05-07arm64: dts: hikey960: pinctrl: Fix spi2/spi3 pinconfLoic Poulain2-5/+5
Only the pinmux was selected, not the pinconf, leading to spi issues. Increase drive strength so that max speed (25Mhz) can be achieved. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-01-08arm64: dts: hi3798cv200: correct PCIe 'bus-range' settingShawn Guo1-1/+1
The PCIe 'bus-range' setting is incorrect and causing the following message during boot. pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under [bus 00-0f] (conflicts with (null) [bus 00-0f]) Correct it to get rid of the message. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-01-06arm64: dts: hi3798cv200-poplar: add linux,rc-map-name for IRShawn Guo1-0/+1
It adds remote control map name for IR device, so that key event can be reported. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-10-26arm64: dts: hisilicon: Add Mali-450 MP4 GPU DT entryPeter Griffin1-0/+38
hi6220 has a Mali450 MP4 so lets add it into the DT. Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-06-25Merge tag 'hisi-arm64-dt-for-5.3' of git://github.com/hisilicon/linux-hisi ↵Olof Johansson3-3/+461
into arm/dt ARM64: DT: Hisilicon SoCs DT updates for v5.3 * Hi3660 SoC and related boards: - Added CoreSight trace components * Hi6220 SoC and related boards: - Updated CoreSight funnel and replicator using new bindings to fix warning * tag 'hisi-arm64-dt-for-5.3' of git://github.com/hisilicon/linux-hisi: arm64: dts: hi3660: Add CoreSight support arm64: dts: hi6220: Update coresight DT bindings Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19arm64: dts: hi3660: Add CoreSight supportWanglai Shi2-0/+458
This patch adds DT bindings for the CoreSight trace components on hi3660, which is used by 96boards Hikey960. Signed-off-by: Wanglai Shi <shiwanglai@hisilicon.com> Reviewed-and-tested-by: Leo Yan <leo.yan@linaro.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-06-19arm64: dts: hi6220: Update coresight DT bindingsLeo Yan1-3/+3
CoreSight DT bindings have been updated, thus the old compatible strings are obsolete and the drivers will report warning if DTS uses these obsolete strings. This patch switches to the new bindings for CoreSight dynamic funnel and static replicator, so can dismiss warning during initialisation. Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Guodong Xu <guodong.xu@linaro.org> Cc: Zhangfei Gao <zhangfei.gao@linaro.org> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 332Thomas Gleixner7-35/+7
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as publishhed by the free software foundation extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 48 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190530000436.292339952@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-15arm64: dts: hisilicon: hi3670: Add UFS controller supportManivannan Sadhasivam1-0/+18
Add UFS controller support for HiSilicon HI3670 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08arm64: dts: hi3660: Fixup unofficial dma-min-chan to dma-channel-maskJohn Stultz1-1/+1
A undocumented and unimplemented binding got into the hi3660 dtsi, and this switches that binding to the now documented one. Cc: Tanglei Han <hantanglei@huawei.com> Cc: Zhuangluan Su <suzhuangluan@hisilicon.com> Cc: Ryan Grachek <ryan@edited.us> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08arm64: dts: hi3660: Add hisi asp dma deviceYoulin Wang1-0/+10
Add asp-dma device to hi3660 dts Cc: Tanglei Han <hantanglei@huawei.com> Cc: Zhuangluan Su <suzhuangluan@hisilicon.com> Cc: Ryan Grachek <ryan@edited.us> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Youlin Wang <wwx575822@notesmail.huawei.com> Signed-off-by: Tanglei Han <hantanglei@huawei.com> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08arm64: dts: hi3660: Add dma to uart nodesJohn Stultz1-0/+8
Try to add DMA support to the uart nodes following the assignments made in the dts from the victoria vendor kernel here: https://consumer.huawei.com/en/opensource/detail/?siteCode=worldwide&keywords=p10&fileType=openSourceSoftware&pageSize=10&curPage=1 Cc: Tanglei Han <hantanglei@huawei.com> Cc: Zhuangluan Su <suzhuangluan@hisilicon.com> Cc: Ryan Grachek <ryan@edited.us> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>