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authorKrzysztof Kozlowski <krzk@kernel.org>2020-06-29 11:16:57 +0300
committerWei Xu <xuwei5@hisilicon.com>2020-07-17 05:24:33 +0300
commit0f6b99d2d6124f3cbbfda745730dc6d21fae07d0 (patch)
treebc396e13fe09d3a5086e1c176a0d2a4477a2eccc /arch/arm64/boot/dts/hisilicon
parent7b8bc95f8e20f77f8bce8d2b8f3eb54958726770 (diff)
downloadlinux-0f6b99d2d6124f3cbbfda745730dc6d21fae07d0.tar.xz
arm64: dts: hisilicon: Align UART nodename with dtschema
Fix dtschema validator warnings like: uart@f8015000: $nodename:0: 'uart@f8015000' does not match '^serial(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon')
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi6220.dtsi10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 2072b637b5af..3d189d9f0d24 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -302,7 +302,7 @@
mboxes = <&mailbox 1 0 11>;
};
- uart0: uart@f8015000 { /* console */
+ uart0: serial@f8015000 { /* console */
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xf8015000 0x0 0x1000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
@@ -311,7 +311,7 @@
clock-names = "uartclk", "apb_pclk";
};
- uart1: uart@f7111000 {
+ uart1: serial@f7111000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xf7111000 0x0 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
@@ -325,7 +325,7 @@
status = "disabled";
};
- uart2: uart@f7112000 {
+ uart2: serial@f7112000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xf7112000 0x0 0x1000>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
@@ -337,7 +337,7 @@
status = "disabled";
};
- uart3: uart@f7113000 {
+ uart3: serial@f7113000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xf7113000 0x0 0x1000>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
@@ -349,7 +349,7 @@
status = "disabled";
};
- uart4: uart@f7114000 {
+ uart4: serial@f7114000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xf7114000 0x0 0x1000>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;