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path: root/arch/arm/mm/proc-v7.S
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2010-01-20ARM: 5888/1: arm: Update comments in cacheflush.h and remove unnecessary V6 a...Tony Lindgren1-2/+0
2010-01-19ARM: 5886/1: arm: Fix cpu_proc_fin() for proc-v7.S and make kexec workTony Lindgren1-1/+8
2009-11-04ARMv7: Check whether the SMP/nAMP mode was already enabledTony Thompson1-3/+4
2009-11-02ARM: ensure initial page tables are setup for SMP systemsRussell King1-3/+4
2009-10-03ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()Kirill A. Shutemov1-1/+1
2009-07-24nommu: Do not set PRRR and NMRR in proc-v7.S if !MMUCatalin Marinas1-1/+1
2009-07-24Thumb-2: Implement the unified arch/arm/mm supportCatalin Marinas1-1/+4
2009-06-15Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds1-11/+48
2009-06-03[ARM] ARMv7 errata: only apply fixes when running on applicable CPURussell King1-11/+25
2009-05-30Add core support for ARMv6/v7 big-endianCatalin Marinas1-0/+3
2009-05-30ARMv7: Document the PRRR and NMRR registers settingCatalin Marinas1-2/+30
2009-05-30ARMv7: Enable the SWP instructionCatalin Marinas1-4/+4
2009-05-30ARMv7: Mark the PTWs inner WBWA on SMP and WB on UPTony Thompson1-3/+9
2009-05-30Check whether the TLB operations need broadcasting on SMP systemsCatalin Marinas1-2/+2
2009-05-03Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds1-0/+19
2009-04-30[ARM] 5489/1: ARM errata: Data written to the L2 cache can be overwritten wit...Catalin Marinas1-0/+5
2009-04-30[ARM] 5490/1: ARM errata: Processor deadlock when a false hazard is createdCatalin Marinas1-0/+6
2009-04-30[ARM] 5487/1: ARM errata: Stale prediction on replaced interworking branchCatalin Marinas1-0/+8
2009-04-28arm: Use __INIT macro instead of .text.init.Tim Abbott1-1/+2
2008-11-27Merge branch 'for-rmk' of git://linux-arm.org/linux-2.6 into develRussell King1-3/+16
2008-11-10Modern processors may need to drain the WB before WFICatalin Marinas1-0/+1
2008-11-06[ARM] mm: fix page table initializationRussell King1-6/+6
2008-11-06ARMv7: Add SMP initialisation to proc-v7.SJon Callan1-2/+15
2008-11-06ARMv7: Do not set TTBR0 in __v7_setupCatalin Marinas1-1/+0
2008-10-22[ARM] 5318/1: Swap the PRRR and NMRR values in proc-v7.SCatalin Marinas1-2/+2
2008-10-10Merge branch 'ptebits' into develRussell King1-17/+12
2008-10-03[ARM] 5229/3: Replace some ARMv7 opcodes with the instruction nameCatalin Marinas1-1/+1
2008-10-01[ARM] Don't include asm/elf.h in asm codeRussell King1-1/+1
2008-10-01[ARM] Convert ARMv7 to use TEX remappingRussell King1-4/+33
2008-10-01[ARM] Convert ARMv6 and ARMv7 to use new memory typesRussell King1-1/+3
2008-10-01[ARM] Convert set_pte_ext implementions to macrosRussell King1-37/+1
2008-09-01[ARM] 5227/1: Add the ENDPROC declarations to the .S filesCatalin Marinas1-0/+8
2008-04-24[ARM] fix 48d7927bdf071d05cf5d15b816cf06b0937cb84fCatalin Marinas1-1/+1
2008-04-19Add a prefetch abort handlerPaul Brook1-0/+1
2007-07-21[ARM] 4503/1: nommu: Add noMMU support for ARMv7Catalin Marinas1-11/+14
2007-07-21[ARM] 4498/1: ARMv7: Remove the L2 cache configuration via the aux ctrl registerCatalin Marinas1-10/+0
2007-05-30[ARM] 4394/1: ARMv7: Add the TLB range operationsCatalin Marinas1-1/+1
2007-05-09[ARM] armv7: add support for ARMv7 cores.Catalin Marinas1-0/+262