summaryrefslogtreecommitdiff
path: root/arch/arm/mm/proc-v7-3level.S
AgeCommit message (Expand)AuthorFilesLines
2013-07-22ARM: 7784/1: mm: ensure SMP alternates assemble to exactly 4 bytes with Thumb-2Will Deacon1-1/+1
2013-07-15arm: delete __cpuinit/__CPUINIT usage from all ARM usersPaul Gortmaker1-4/+0
2013-05-30ARM: LPAE: accomodate >32-bit addresses for page table baseCyril Chemparathy1-0/+8
2013-05-30ARM: LPAE: factor out T1SZ and TTBR1 computationsCyril Chemparathy1-21/+8
2013-05-30ARM: LPAE: use phys_addr_t in switch_mm()Cyril Chemparathy1-4/+12
2013-04-03ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP insteadWill Deacon1-1/+2
2013-03-04ARM: 7652/1: mm: fix missing use of 'asid' to get asid value from mm->context.idBen Dooks1-1/+1
2013-02-16ARM: 7650/1: mm: replace direct access to mm->context.id with new macroBen Dooks1-1/+1
2012-11-09ARM: mm: introduce present, faulting entries for PAGE_NONEWill Deacon1-0/+3
2012-11-09ARM: mm: introduce L_PTE_VALID for page table entriesWill Deacon1-1/+1
2011-12-08ARM: LPAE: MMU setup for the 3-level page table formatCatalin Marinas1-0/+150