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path: root/arch/arm/mm/cache-v7.S
AgeCommit message (Expand)AuthorFilesLines
2011-09-17ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeedWill Deacon1-0/+20
2011-07-07ARM: mm: cache-v7: Use the new processor struct macrosDave Martin1-13/+2
2011-05-26ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_areaWill Deacon1-0/+2
2011-03-31Fix common misspellingsLucas De Marchi1-1/+1
2010-12-13ARM: 6528/1: Use CTR for the I-cache line size on ARMv7Catalin Marinas1-10/+17
2010-10-04ARM: 6405/1: Handle __flush_icache_all for CONFIG_SMP_ON_UPTony Lindgren1-0/+16
2010-10-04ARM: Allow SMP kernels to boot on UP systemsRussell King1-10/+4
2010-05-21ARM: 6139/1: ARMv7: Use the Inner Shareable I-cache on MPSantosh Shilimkar1-0/+4
2010-05-08ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMPCatalin Marinas1-0/+4
2010-02-15ARM: dma-mapping: fix for speculative prefetchingRussell King1-4/+6
2010-02-15ARM: dma-mapping: remove dmac_clean_range and dmac_inv_rangeRussell King1-4/+2
2010-02-15ARM: dma-mapping: provide per-cpu type map/unmap functionsRussell King1-0/+26
2009-12-14ARM: add size argument to __cpuc_flush_dcache_pageRussell King1-6/+7
2009-10-07ARM: 5746/1: Handle possible translation errors in ARMv6/v7 coherent_user_rangeCatalin Marinas1-2/+17
2009-07-24Thumb-2: Implement the unified arch/arm/mm supportCatalin Marinas1-5/+11
2008-11-06ARMv7: Add extra barriers for flush_cache_all compressed/head.SCatalin Marinas1-0/+2
2008-09-01[ARM] 5227/1: Add the ENDPROC declarations to the .S filesCatalin Marinas1-0/+10
2007-05-09[ARM] armv7: add support for ARMv7 cores.Catalin Marinas1-0/+253
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