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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
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starfive-6.1.65-dubhe
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visionfive-5.15.y-devel
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visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
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StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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arch
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arm
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boot
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dts
/
socfpga_arria10.dtsi
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Author
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2015-10-06
ARM: socfpga: dts: add clock fields for I2C, UART and USB on Arria10
Dinh Nguyen
1
-0
/
+8
2015-08-13
Merge tag 'socfpga_dts_for_v4.3_part_2' of git://git.kernel.org/pub/scm/linux...
Olof Johansson
1
-0
/
+6
2015-08-10
ARM: socfpga: dts: Add resets for EMACs on Arria10
Dinh Nguyen
1
-0
/
+5
2015-08-10
ARM: socfpga: dts: add "altr,modrst-offset" property
Dinh Nguyen
1
-0
/
+1
2015-07-20
ARM: dts: socfpga: use stdout-path for chosen node
Dinh Nguyen
1
-0
/
+5
2015-06-26
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/ar...
Linus Torvalds
1
-16
/
+336
2015-06-24
arm: socfpga: dts: Add Arria10 SDRAM EDAC DTS support
Thor Thayer
1
-0
/
+11
2015-06-11
ARM: socfpga: dts: enable ethernet for Arria10 devkit
Dinh Nguyen
1
-0
/
+11
2015-06-11
Merge tag 'socfpga_dts_for_v4.2_part_3' of git://git.kernel.org/pub/scm/linux...
Kevin Hilman
1
-0
/
+6
2015-06-02
ARM: socfpga: dts: add enable-method property for cpu nodes
Dinh Nguyen
1
-0
/
+1
2015-06-02
ARM: socfpga: dts: add the a9-scu node for arria10
Dinh Nguyen
1
-0
/
+5
2015-05-11
ARM: socfpga: dts: add clocks to the Arria10 platform
Dinh Nguyen
1
-4
/
+305
2015-05-11
ARM: socfpga: dts: Add tx-fifo-depth and rx-fifo-depth properties
Vince Bridgers
1
-0
/
+4
2015-05-11
ARM: socfpga: dts: Add multicast bins and unicast filter entries
Vince Bridgers
1
-0
/
+6
2015-05-11
ARM: socfpga: dts: enable UART1 for the debug uart
Dinh Nguyen
1
-12
/
+0
2015-05-11
ARM: socfpga: dts: disable the sdmmc, and uart nodes in the base arria10
Dinh Nguyen
1
-0
/
+3
2015-05-11
ARM: socfpga: dts: add cpu1-start-addr for Arria 10
Dinh Nguyen
1
-0
/
+1
2014-11-21
arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC
Dinh Nguyen
1
-0
/
+374