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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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Documentation
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fpga
/
dfl.rst
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2022-05-10
Documentation: fpga: dfl: add link address of feature id table
Tianfei zhang
1
-0
/
+5
2021-07-22
fpga: fix spelling mistakes
Tom Rix
1
-2
/
+2
2021-06-09
Documentation: fpga: dfl: change FPGA indirect article to an
Tom Rix
1
-2
/
+2
2021-03-28
Documentation: fpga: dfl: Add description for DFL UIO support
Xu Yilun
1
-0
/
+26
2021-01-14
fpga: dfl-pci: rectify ReST formatting
Lukas Bulwahn
1
-1
/
+2
2021-01-07
fpga: dfl-pci: locate DFLs by PCIe vendor specific capability
Matthew Gerlach
1
-0
/
+27
2020-08-05
Merge tag 'char-misc-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/gi...
Linus Torvalds
1
-0
/
+19
2020-07-13
Documentation: fpga: eliminate duplicated word
Randy Dunlap
1
-1
/
+1
2020-07-07
Documentation: fpga: dfl: add descriptions for interrupt related interfaces.
Xu Yilun
1
-0
/
+19
2020-04-28
Documentation: fpga: dfl: add description for performance reporting support
Xu Yilun
1
-0
/
+84
2019-10-17
Documentation: fpga: dfl: add descriptions for thermal/power management inter...
Xu Yilun
1
-0
/
+10
2019-09-04
Documentation: fpga: dfl: add descriptions for virtualization and new interfa...
Wu Hao
1
-0
/
+105
2019-06-14
docs: fpga: convert docs to ReST and rename to *.rst
Mauro Carvalho Chehab
1
-0
/
+291