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2023-12-06dt-bindings: arm: fsl: add verdin imx8mp mallow boardJoao Paulo Goncalves1-0/+2
Add Mallow carrier board for wifi and nonwifi variants of Toradex Verdin IMX8MP SoM. Mallow is a low-cost carrier board in the Verdin family with a small form factor and build for volume production making it ideal for industrial and embedded applications. https://www.toradex.com/products/carrier-board/mallow-carrier-board Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06dt-bindings: arm: fsl: add verdin imx8mm mallow boardJoao Paulo Goncalves1-0/+2
Add Mallow carrier board for wifi and nonwifi variants of Toradex Verdin IMX8MM SoM. Mallow is a low-cost carrier board in the Verdin family with a small form factor and build for volume production making it ideal for industrial and embedded applications. https://www.toradex.com/products/carrier-board/mallow-carrier-board Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8mm: Slow default video_pll1 clock rateAdam Ford1-1/+1
Since commit 8208181fe536 ("clk: imx: composite-8m: Add imx8m_divider_determine_rate") the lcdif controller has had the ability to set the lcdif_pixel rate which propagates up the tree and sets the video_pll1 rate automatically. By setting this value low, it will force the recalculation of video_pll1 to the lowest rate needed by lcdif instead of dividing a larger clock down to the desired clock speed. This has the advantage of being able to lower the video_pll1 rate from 594MHz to 148.5MHz when operating at 1080p. It can go even lower when operating at lower resolutions and refresh rates. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> # Kontron BL i.MX8MM Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8mm: Remove video_pll1 clock rate from clk nodeAdam Ford1-2/+0
There are two clock-rate assignments for video_pll1, and the only one it should really have belongs inside the lcdif node, since it's the only consumer of this clock. Remove it from the clk node. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> # Kontron BL i.MX8MM Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8mm: Simplify mipi_dsi clocksAdam Ford1-6/+2
The device tree clock structure for the mipi_dsi is unnecessarily redundant. The default clock parent of IMX8MM_CLK_DSI_PHY_REF is already IMX8MM_CLK_24M, so there is no need to set the parent-child relationship between them. The default clock rates for IMX8MM_SYS_PLL1_266M and IMX8MM_CLK_24M are already defined to be 266MHz and 24MHz respectively, so there is no need to define those clock rates. On i.MX8M[MNP] the samsung,pll-clock-frequency is not necessary, because the driver will read it from sclk_mipi which is also already set to 24MHz making it also redundant. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> # Kontron BL i.MX8MM Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06ARM: dts: imx7s: Add on-chip memoryPhilipp Zabel1-0/+9
Add the 128 KiB on-chip SRAM at address 0x900000. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Roland Hieber <rhi@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06ARM: dts: imx7: add MIPI-DSI supportMarco Felsch1-0/+46
This adds the device tree support for the MIPI-DSI block. The block can be used as encoder for the parallel signals coming from the lcdif block. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Roland Hieber <rhi@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06ARM: dts: nxp: Fix some common switch mistakesLinus Walleij5-70/+70
Fix some errors in the Marvell MV88E6xxx switch descriptions: - switch0@0 is not OK, should be ethernet-switch@0 - ports should be ethernet-ports - port should be ethernet-port - phy should be ethernet-phy Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: freescale: minor whitespace cleanup around '='Krzysztof Kozlowski3-5/+5
The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8dxl-ss-ddr: change ddr_pmu0 compatibleXu Yang1-1/+1
i.MX8DXL's ddr pmu has port/channel filter capabilities, but it still is compatible with "fsl,imx8-ddr-pmu". This will change the compatible. Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: tqma8mpql: Remove invalid/unused propertyAlexander Stein1-1/+0
'dr_mode' is part of the USB DWC3 core, not the glue layer. Remove the property from glue layer. Fixes the dtbs_check warning: arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dtb: usb@32f10108: 'dr_mode' does not match any of the regexes: '^usb@[0-9a-f]+$', 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml# Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8-ss-audio: Remove unexistent'shared-interrupt'Fabio Estevam1-2/+0
The 'shared-interrupt' property is not documented nor used anywhere. Remove it. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx93: Remove unexistent 'shared-interrupt'Fabio Estevam1-1/+0
The 'shared-interrupt' property is not documented nor used anywhere. Remove it. This fixes the following schema warning: imx93-11x11-evk.dtb: dma-controller@42000000: Unevaluated properties are not allowed ('shared-interrupt' was unexpected) from schema $id: http://devicetree.org/schemas/dma/fsl,edma.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8qxp-mek: Fix gpio-sbu-mux compatibleFabio Estevam1-1/+1
Per gpio-sbu-mux.yaml, the compatible entry is incomplete. The imx8qxp-mek board uses a CBDTU02043, so complete the gpio-sbu-mux compatible accordingly. This fixes the following schema warning: imx8qxp-mek.dtb: gpio-sbu-mux: compatible:0: 'gpio-sbu-mux' is not one of ['onnn,fsusb43l10x', 'pericom,pi3usb102'] from schema $id: http://devicetree.org/schemas/usb/gpio-sbu-mux.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8mp-debix-model-a: Use phy-modeFabio Estevam1-1/+1
The property 'phy-connection-type' can be used to describe the interface type between the Ethernet device and the Ethernet PHY device. However, snps,dwmac.yaml gives the following warning: imx8mp-debix-model-a.dtb: ethernet@30bf0000: 'phy-mode' is a required property from schema $id: http://devicetree.org/schemas/net/snps,dwmac.yaml# To avoid the warning, switch to the more commonly used, 'phy-mode' property instead. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8mm-nitrogen-r2: Fix I2C mux subnode nameFabio Estevam1-1/+1
Per i2c-mux-pca954x.yaml, the I2C subnodes should follow the 'i2c@' format. Change it to fix the following schema warning: imx8mm-nitrogen-r2.dtb: i2c-mux@70: Unevaluated properties are not allowed ('i2c3@0' was unexpected) from schema $id: http://devicetree.org/schemas/i2c/i2c-mux-pca954x.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8dxl-ss-conn: Fix Ethernet interrupt-names orderFabio Estevam1-1/+1
Per snps,dwmac.yaml, the interrupt-names entries should be in the following order: "macirq", "eth_wake_irq"; Change it to fix the following schema warnings. imx8dxl-evk.dtb: ethernet@5b050000: interrupt-names:0: 'macirq' was expected from schema $id: http://devicetree.org/schemas/net/snps,dwmac.yaml# imx8dxl-evk.dtb: ethernet@5b050000: interrupt-names:1: 'macirq' is not one of ['eth_wake_irq', 'eth_lpi'] from schema $id: http://devicetree.org/schemas/net/snps,dwmac.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8mm-emcon-avari: Fix gpio-cellsFabio Estevam1-1/+1
Per nxp,pcf8575.yaml, #gpio-cells should be 2. Change it to fix the following schema warning: imx8mm-emcon-avari.dtb: gpio@3a: #gpio-cells:0:0: 2 was expected from schema $id: http://devicetree.org/schemas/gpio/nxp,pcf8575.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8qm-ss-dma: Pass lpuart dma-namesFabio Estevam1-0/+4
Per fsl-lpuart.yaml, when the 'dmas' property is used 'dma-names' should also be present. Pass the lpuart 'dma-names' property to fix the following schema warnings: imx8dxl-evk.dtb: serial@5a060000: dma-names:0: 'rx' was expected from schema $id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml# imx8dxl-evk.dtb: serial@5a060000: dma-names:1: 'tx' was expected from schema $id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml# imx8dxl-evk.dtb: serial@5a060000: Unevaluated properties are not allowed ('dma-names' was unexpected) from schema $id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: freescale: Add SKOV IMX8MP CPU revB boardOleksij Rempel5-0/+935
Add Skov i.MX8MP based climate controller. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8mn-var-som-symphony: add vcc supply for PCA9534Hugo Villeneuve1-0/+10
The following warning is shown when probing device: pca953x 1-0020: supply vcc not found, using dummy regulator Define a new fixed 3.3v regulator for carrier board peripherals, enabled by mosfet switch Q2 after the SOM_3V3 supply rises (no software control). Add this new regulator as vcc supply to the PCA9534 to silence the warning. Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: freescale: introduce rve-gateway boardHugo Villeneuve2-0/+286
The RVE gateway board is based on a Variscite VAR-SOM-NANO, with a NXP MX8MN nano CPU. Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: freescale: debix-som-a-bmb-08: Add CSI Power RegulatorsKieran Bingham1-0/+56
Provide the 1.8 and 3.3 volt regulators that are utilised on the Debix SOM BMB-08 base board. Facilitate this by also supplying the pin control used to enable the regulators on the second MIPI CSI port. Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8-apalis: add can power-up delay on ixora boardAndrejs Cainikovs1-0/+2
Newer variants of Ixora boards require a power-up delay when powering up the CAN transceiver of up to 1ms. Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8mn-var-som: add fixed 3.3V regulator for EEPROMHugo Villeneuve1-0/+9
When the EEPROM is probed, we have this warning: at24 0-0052: supply vcc not found, using dummy regulator Add fixed 3.3v regulator to silence the warning. Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8mm-venice-gw7: Fix pci sub-nodesFabio Estevam3-27/+47
Several schema warnings are seen when running: make dtbs_check DT_SCHEMA_FILES=pci-bus.yaml Fix them. Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8mp: Disable dsp reserved memory by defaultAlexander Stein1-0/+1
Even if the 'dsp' node is disabled the memory intended to be used by the DSP is reserved. This limits the memory range suitable for CMA allocation. Thus disable the dsp_reserved node. DSP users need to enable it in parallel to the 'dsp' node. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8mp: Add NPU NodeAdam Ford1-0/+21
The NPU is based on the Vivante GC8000 and its power-domain is controlled my pgc_mlmix. Since the power-domain uses some of these clocks, setup the clock parent and rates inside the power-domain, and add the NPU node. The data sheet states the CLK_ML_AHB should be 300MHz for nominal, but 800MHz clock will divide down to 266 instead. Boards which operate in over-drive mode should update the clocks on their boards accordingly. When the driver loads, the NPU numerates as: etnaviv-gpu 38500000.npu: model: GC8000, revision: 8002 Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: freescale: debix-som: Add heartbeat LEDKieran Bingham1-0/+22
Map the 'RUN' LED present on the Debix-SOM as a heartbeat. Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: freescale: Add dual-channel LVDS overlay for TQMa8MPxLAlexander Stein2-0/+79
This adds an overlay for the supported LVDS display AUO G133HAN01. Configure the video PLL frequency to exactly match typical pixel clock of 141.200 MHz. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06arm64: dts: imx8mp-venice-gw74xx: remove unecessary propreties in tpm nodeTim Harvey1-2/+0
Remove unnecessary #address-cells and #size-cells from tpm node. Fixes: 531936b218d8 ("arm64: dts: imx8mp-venice-gw74xx: update to revB PCB") Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06ARM: dts: nxp: minor whitespace cleanup around '='Krzysztof Kozlowski20-27/+27
The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06ARM: dts: imx7d-colibri-emmc: Add usdhc aliasesHiago De Franco1-0/+4
Add mmc aliases to ensure a consistent mmc device naming across the Toradex SoM family, with this commit mmc0 is the on-module eMMC boot device and the not available mmc interfaces are removed. Signed-off-by: Hiago De Franco <hiago.franco@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06ARM: dts: imx6qdl-colibri: Add usdhc aliasesHiago De Franco1-0/+7
Add mmc aliases to ensure a consistent mmc device naming across the Toradex SoM family, with this commit mmc0 is the on-module eMMC boot device and the not available mmc interfaces are removed. Signed-off-by: Hiago De Franco <hiago.franco@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06ARM: dts: imx6qdl-apalis: Add usdhc aliasesHiago De Franco1-0/+7
Add mmc aliases to ensure a consistent mmc device naming across the Toradex SoM family, with this commit mmc0 is the on-module eMMC boot device and the not available mmc interfaces are removed. Signed-off-by: Hiago De Franco <hiago.franco@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06ARM: dts: nxp: imx7d-pico: add cpu-supply nodesLech Perczak1-0/+8
The PICO-IMX7D SoM has the usual power supply configuration using output sw1a of PF3000 PMIC, which was defined in downstream derivative of linux-imx (see link) in the sources for "Android Things" devkit. It is required to support CPU frequency scaling. Map the respective "cpu-supply" nodes of each core to sw1a of the PMIC. Enabling them causes cpufreq-dt, and imx-thermal drivers to probe successfully, and CPU frequency scaling to function. Link: https://android.googlesource.com/platform/hardware/bsp/kernel/nxp/imx-v4.1/+/o-iot-preview-5/arch/arm/boot/dts/imx7d-pico.dtsi#849 Cc: Fabio Estevam <festevam@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Lech Perczak <lech.perczak@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06dt-bindings: arm: Add compatible for SKOV i.MX8MP RevB boardOleksij Rempel1-0/+3
Add DT compatible string for a SKOV i.MX8MP RevB climate controller board. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06dt-bindings: arm: fsl: add RVE gateway boardHugo Villeneuve1-1/+3
Add DT compatible string for RVE gateway board based on a Variscite VAR-SOM-NANO with a NXP MX8MN nano CPU. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06dt-bindings: vendor-prefixes: add rveHugo Villeneuve1-0/+2
Add vendor prefix for Recharge Véhicule Électrique (RVE), which manufactures electric vehicle chargers infrastructure components. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-05ARM: dts: imx: tqma7: add lm75a sensor (rev. 01xxx)João Rodrigues1-2/+7
TQMa7x (revision 01xxx) uses a LM75A temperature sensor. The two sensors use different I2C addresses, so we can set both sensors simultaneously. Signed-off-by: João Rodrigues <jrodrigues@ubimet.com> Reviewed-by: Bruno Thomsen <bruno.thomsen@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-05ARM: dts: rockchip: Move uart aliases to SoC dtsi for RK3128Alex Bee2-2/+4
SoC TRM, SoC datasheet and board schematics always refer to the same uart numbers - even if not all are used for a specific board. In order to not have to re-define them for every board move the aliases to SoC dtsi for RK3128 like it's being done for all other Rockchip ARM SoCs. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231202130506.66738-5-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Move i2c aliases to SoC dtsi for RK3128Alex Bee2-1/+4
SoC TRM, SoC datasheet and board schematics always refer to the same i2c numbers - even if not all are used for a specific board. In order to not have to re-define them for every board move the aliases to SoC dtsi for RK3128 like it's being done for all other Rockchip ARM SoCs. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231202130506.66738-4-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Move gpio aliases to SoC dtsi for RK3128Alex Bee3-8/+7
SoC TRM, SoC datasheet and board schematics always refer to the same gpio numbers - even if not all are used for a specific board. In order to not have to re-define them for every board move the aliases to SoC dtsi for RK3128 like it's being done for most other Rockchip ARM SoCs. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20231202130506.66738-3-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Add Sonoff iHost Smart Home HubTim Lunn4-0/+456
Sonoff iHost is gateway device designed to provide a Smart Home Hub, it is based on Rockchip RV1126. There is also a version with 2GB RAM based off the RV1109 dual core SoC. Features: - Rockchip RV1126 - 4GB DDR4 - 8GB eMMC - microSD slot - RMII Ethernet PHY - 1x USB 2.0 Host - 1x USB 2.0 OTG - Realtek RTL8723DS WiFi/BT - EFR32MG21 Silabs Zigbee radio - Speaker/Microphone This patch adds the initial device tree for this device, it is largely based off the device trees for mainline Edgeble Neu2 and downstream Rockchip rv1126-evb-v13 configs. It has been adapted with relevant peripheral and GPIO pins for the iHost. Signed-off-by: Tim Lunn <tim@feathertop.org> Link: https://lore.kernel.org/r/20231203124004.2676174-8-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05dt-bindings: arm: rockchip: Add Sonoff iHostTim Lunn1-0/+7
Sonoff iHost is a smart home hub with built in radios for wifi/bt and Zigbee. It is based off the Rockchip RV1126 (or RV1109) SoC. Signed-off-by: Tim Lunn <tim@feathertop.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231203124004.2676174-9-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Add rv1109 SoCTim Lunn1-0/+23
The Rockchip rv1109 SoC is a dual core version of the rv1126. It is otherwise identical and shares the same device tree config. This patch introduces a dtsi file to drop the additional cpu nodes. Taken from Rockchip BSP kernel. Signed-off-by: Tim Lunn <tim@feathertop.org> Link: https://lore.kernel.org/r/20231203124004.2676174-7-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Split up rgmii1 pinctrl on rv1126Tim Lunn2-14/+34
Split up the pinctrl definitions for rgmii1 so it can be shared with devices using an RMII PHY. Signed-off-by: Tim Lunn <tim@feathertop.org> Link: https://lore.kernel.org/r/20231203124004.2676174-6-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Add i2c2 node to rv1126Tim Lunn2-0/+25
Add i2c2 node and i2c2_xfer pinctrl for Rockchip RV1126 Signed-off-by: Tim Lunn <tim@feathertop.org> Link: https://lore.kernel.org/r/20231203124004.2676174-5-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Serial aliases for rv1126Tim Lunn1-0/+6
Add serial aliases for uart nodes so that serial devices are created Signed-off-by: Tim Lunn <tim@feathertop.org> Link: https://lore.kernel.org/r/20231203124004.2676174-3-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-05ARM: dts: rockchip: Add alternate UART pins to rv1126Tim Lunn1-0/+16
Add uart3m2_xfer and uart4m2_xfer pins for Rockchip RV1126. These are used as serial ports for the indicator and Zigbee radio on the iHost. Signed-off-by: Tim Lunn <tim@feathertop.org> Link: https://lore.kernel.org/r/20231203124004.2676174-2-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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