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authorTim Lunn <tim@feathertop.org>2023-12-03 15:40:02 +0300
committerHeiko Stuebner <heiko@sntech.de>2023-12-05 11:20:44 +0300
commit36ad2e479f69d93a27bc0721308e90a4c1101e70 (patch)
treed1c9b4ab94190e886dca2170b3dea4fb452fdca9
parent32de939ae49d541a7892f77da8fe78bc6fe73f13 (diff)
downloadlinux-36ad2e479f69d93a27bc0721308e90a4c1101e70.tar.xz
ARM: dts: rockchip: Add rv1109 SoC
The Rockchip rv1109 SoC is a dual core version of the rv1126. It is otherwise identical and shares the same device tree config. This patch introduces a dtsi file to drop the additional cpu nodes. Taken from Rockchip BSP kernel. Signed-off-by: Tim Lunn <tim@feathertop.org> Link: https://lore.kernel.org/r/20231203124004.2676174-7-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--arch/arm/boot/dts/rockchip/rv1109.dtsi23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rockchip/rv1109.dtsi b/arch/arm/boot/dts/rockchip/rv1109.dtsi
new file mode 100644
index 000000000000..9cbaa08ab1b8
--- /dev/null
+++ b/arch/arm/boot/dts/rockchip/rv1109.dtsi
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rv1126.dtsi"
+
+/ {
+ compatible = "rockchip,rv1109";
+
+ cpus {
+ /delete-node/ cpu@f02;
+ /delete-node/ cpu@f03;
+ };
+
+ arm-pmu {
+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>;
+ };
+};