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path: root/drivers/pinctrl/pinctrl-cy8c95x0.c
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Diffstat (limited to 'drivers/pinctrl/pinctrl-cy8c95x0.c')
-rw-r--r--drivers/pinctrl/pinctrl-cy8c95x0.c15
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c
index 75be06d29dc1..367a9386dfb7 100644
--- a/drivers/pinctrl/pinctrl-cy8c95x0.c
+++ b/drivers/pinctrl/pinctrl-cy8c95x0.c
@@ -573,7 +573,8 @@ static int cy8c95x0_gpio_direction_input(struct gpio_chip *gc, unsigned int off)
ret = regmap_write_bits(chip->regmap, CY8C95X0_DRV_HIZ, bit, bit);
if (ret)
goto out;
- clear_bit(off, chip->push_pull);
+
+ __clear_bit(off, chip->push_pull);
}
out:
@@ -775,27 +776,27 @@ static int cy8c95x0_gpio_set_pincfg(struct cy8c95x0_pinctrl *chip,
switch (param) {
case PIN_CONFIG_BIAS_PULL_UP:
- clear_bit(off, chip->push_pull);
+ __clear_bit(off, chip->push_pull);
reg = CY8C95X0_DRV_PU;
break;
case PIN_CONFIG_BIAS_PULL_DOWN:
- clear_bit(off, chip->push_pull);
+ __clear_bit(off, chip->push_pull);
reg = CY8C95X0_DRV_PD;
break;
case PIN_CONFIG_BIAS_DISABLE:
- clear_bit(off, chip->push_pull);
+ __clear_bit(off, chip->push_pull);
reg = CY8C95X0_DRV_HIZ;
break;
case PIN_CONFIG_DRIVE_OPEN_DRAIN:
- clear_bit(off, chip->push_pull);
+ __clear_bit(off, chip->push_pull);
reg = CY8C95X0_DRV_ODL;
break;
case PIN_CONFIG_DRIVE_OPEN_SOURCE:
- clear_bit(off, chip->push_pull);
+ __clear_bit(off, chip->push_pull);
reg = CY8C95X0_DRV_ODH;
break;
case PIN_CONFIG_DRIVE_PUSH_PULL:
- set_bit(off, chip->push_pull);
+ __set_bit(off, chip->push_pull);
reg = CY8C95X0_DRV_PP_FAST;
break;
case PIN_CONFIG_MODE_PWM: