diff options
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlxsw/cmd.h')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/cmd.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/cmd.h b/drivers/net/ethernet/mellanox/mlxsw/cmd.h index 5ffdfb532cb7..392ce3cb27f7 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/cmd.h +++ b/drivers/net/ethernet/mellanox/mlxsw/cmd.h @@ -343,6 +343,23 @@ static inline int mlxsw_cmd_boardinfo(struct mlxsw_core *mlxsw_core, 0, 0, false, out_mbox, MLXSW_CMD_MBOX_SIZE); } +/* cmd_mbox_xm_num_local_ports + * Number of local_ports connected to the xm. + * Each local port is a 4x + * Spectrum-2/3: 25G + * Spectrum-4: 50G + */ +MLXSW_ITEM32(cmd_mbox, boardinfo, xm_num_local_ports, 0x00, 4, 3); + +/* cmd_mbox_xm_exists + * An XM (eXtanded Mezanine, e.g. used for the XLT) is connected on the board. + */ +MLXSW_ITEM32(cmd_mbox, boardinfo, xm_exists, 0x00, 0, 1); + +/* cmd_mbox_xm_local_port_entry + */ +MLXSW_ITEM_BIT_ARRAY(cmd_mbox, boardinfo, xm_local_port_entry, 0x04, 4, 8); + /* cmd_mbox_boardinfo_intapin * When PCIe interrupt messages are being used, this value is used for clearing * an interrupt. When using MSI-X, this register is not used. @@ -657,6 +674,12 @@ MLXSW_ITEM32(cmd_mbox, config_profile, set_kvd_hash_double_size, 0x0C, 26, 1); */ MLXSW_ITEM32(cmd_mbox, config_profile, set_cqe_version, 0x08, 0, 1); +/* cmd_mbox_config_set_kvh_xlt_cache_mode + * Capability bit. Setting a bit to 1 configures the profile + * according to the mailbox contents. + */ +MLXSW_ITEM32(cmd_mbox, config_profile, set_kvh_xlt_cache_mode, 0x08, 3, 1); + /* cmd_mbox_config_profile_max_vepa_channels * Maximum number of VEPA channels per port (0 through 16) * 0 - multi-channel VEPA is disabled @@ -783,6 +806,13 @@ MLXSW_ITEM32(cmd_mbox, config_profile, adaptive_routing_group_cap, 0x4C, 0, 16); */ MLXSW_ITEM32(cmd_mbox, config_profile, arn, 0x50, 31, 1); +/* cmd_mbox_config_profile_kvh_xlt_cache_mode + * KVH XLT cache mode: + * 0 - XLT can use all KVH as best-effort + * 1 - XLT cache uses 1/2 KVH + */ +MLXSW_ITEM32(cmd_mbox, config_profile, kvh_xlt_cache_mode, 0x50, 8, 4); + /* cmd_mbox_config_kvd_linear_size * KVD Linear Size * Valid for Spectrum only |