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path: root/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
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Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h')
-rw-r--r--drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h36
1 files changed, 3 insertions, 33 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
index 7fbebc1979cf..02de3b6199e5 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
@@ -31,22 +31,7 @@
#define MP1_Public 0x03b00000
#define MP1_SRAM 0x03c00004
-
-struct smu_12_0_cmn2aisc_mapping {
- int valid_mapping;
- int map_to;
-};
-
-int smu_v12_0_send_msg_without_waiting(struct smu_context *smu,
- uint16_t msg);
-
-int smu_v12_0_wait_for_response(struct smu_context *smu);
-
-int
-smu_v12_0_send_msg_with_param(struct smu_context *smu,
- enum smu_message_type msg,
- uint32_t param,
- uint32_t *read_arg);
+#if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3)
int smu_v12_0_check_fw_status(struct smu_context *smu);
@@ -60,29 +45,13 @@ int smu_v12_0_powergate_jpeg(struct smu_context *smu, bool gate);
int smu_v12_0_set_gfx_cgpg(struct smu_context *smu, bool enable);
-int smu_v12_0_read_sensor(struct smu_context *smu,
- enum amd_pp_sensors sensor,
- void *data, uint32_t *size);
-
uint32_t smu_v12_0_get_gfxoff_status(struct smu_context *smu);
int smu_v12_0_gfx_off_control(struct smu_context *smu, bool enable);
-int smu_v12_0_init_smc_tables(struct smu_context *smu);
-
int smu_v12_0_fini_smc_tables(struct smu_context *smu);
-int smu_v12_0_populate_smc_tables(struct smu_context *smu);
-
-int smu_v12_0_get_enabled_mask(struct smu_context *smu,
- uint32_t *feature_mask, uint32_t num);
-
-int smu_v12_0_get_current_clk_freq(struct smu_context *smu,
- enum smu_clk_type clk_id,
- uint32_t *value);
-
-int smu_v12_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type,
- uint32_t *min, uint32_t *max);
+int smu_v12_0_set_default_dpm_tables(struct smu_context *smu);
int smu_v12_0_mode2_reset(struct smu_context *smu);
@@ -92,3 +61,4 @@ int smu_v12_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_
int smu_v12_0_set_driver_table_location(struct smu_context *smu);
#endif
+#endif