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-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c2
-rw-r--r--drivers/gpu/drm/amd/display/include/dpcd_defs.h16
2 files changed, 1 insertions, 17 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 7238bfe0a068..d32bf61b66e9 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2129,7 +2129,7 @@ static void retrieve_link_cap(struct core_link *link)
link->dpcd_caps.panel_mode_edp =
edp_config_cap.bits.ALT_SCRAMBLER_RESET;
- link->edp_revision = DPCD_EDP_REVISION_EDP_UNKNOWN;
+ link->edp_revision = EDP_REVISION_11;
link->public.test_pattern_enabled = false;
link->public.compliance_test_state.raw = 0;
diff --git a/drivers/gpu/drm/amd/display/include/dpcd_defs.h b/drivers/gpu/drm/amd/display/include/dpcd_defs.h
index e6db9cee328a..ea8f5867e834 100644
--- a/drivers/gpu/drm/amd/display/include/dpcd_defs.h
+++ b/drivers/gpu/drm/amd/display/include/dpcd_defs.h
@@ -144,20 +144,4 @@ enum dpcd_psr_sink_states {
PSR_SINK_STATE_SINK_INTERNAL_ERROR = 7,
};
-/* This enum defines the Panel's eDP revision at DPCD 700h
- * 00h = eDP v1.1 or lower
- * 01h = eDP v1.2
- * 02h = eDP v1.3 (PSR support starts here)
- * 03h = eDP v1.4
- * If unknown revision, treat as eDP v1.1, meaning least functionality set.
- * This enum has values matched to eDP spec, thus values should not change.
- */
-enum dpcd_edp_revision {
- DPCD_EDP_REVISION_EDP_V1_1 = 0,
- DPCD_EDP_REVISION_EDP_V1_2 = 1,
- DPCD_EDP_REVISION_EDP_V1_3 = 2,
- DPCD_EDP_REVISION_EDP_V1_4 = 3,
- DPCD_EDP_REVISION_EDP_UNKNOWN = DPCD_EDP_REVISION_EDP_V1_1,
-};
-
#endif /* __DAL_DPCD_DEFS_H__ */