diff options
Diffstat (limited to 'arch/tile/kernel')
| -rw-r--r-- | arch/tile/kernel/module.c | 11 | ||||
| -rw-r--r-- | arch/tile/kernel/pci-dma.c | 12 | ||||
| -rw-r--r-- | arch/tile/kernel/pci.c | 2 | ||||
| -rw-r--r-- | arch/tile/kernel/pci_gx.c | 2 | ||||
| -rw-r--r-- | arch/tile/kernel/process.c | 2 | ||||
| -rw-r--r-- | arch/tile/kernel/setup.c | 18 | ||||
| -rw-r--r-- | arch/tile/kernel/single_step.c | 2 | ||||
| -rw-r--r-- | arch/tile/kernel/smp.c | 2 | ||||
| -rw-r--r-- | arch/tile/kernel/time.c | 4 | ||||
| -rw-r--r-- | arch/tile/kernel/unaligned.c | 4 |
10 files changed, 33 insertions, 26 deletions
diff --git a/arch/tile/kernel/module.c b/arch/tile/kernel/module.c index 2305084c9b93..09233fbe7801 100644 --- a/arch/tile/kernel/module.c +++ b/arch/tile/kernel/module.c @@ -43,29 +43,28 @@ void *module_alloc(unsigned long size) int npages; npages = (size + PAGE_SIZE - 1) / PAGE_SIZE; - pages = kmalloc(npages * sizeof(struct page *), GFP_KERNEL); + pages = kmalloc_array(npages, sizeof(*pages), GFP_KERNEL); if (pages == NULL) return NULL; for (; i < npages; ++i) { pages[i] = alloc_page(GFP_KERNEL | __GFP_HIGHMEM); if (!pages[i]) - goto error; + goto free_pages; } area = __get_vm_area(size, VM_ALLOC, MEM_MODULE_START, MEM_MODULE_END); if (!area) - goto error; + goto free_pages; area->nr_pages = npages; area->pages = pages; if (map_vm_area(area, prot_rwx, pages)) { vunmap(area->addr); - goto error; + goto free_pages; } return area->addr; - -error: + free_pages: while (--i >= 0) __free_page(pages[i]); kfree(pages); diff --git a/arch/tile/kernel/pci-dma.c b/arch/tile/kernel/pci-dma.c index 09bb774b39cd..24e0f8c21f2f 100644 --- a/arch/tile/kernel/pci-dma.c +++ b/arch/tile/kernel/pci-dma.c @@ -213,10 +213,12 @@ static int tile_dma_map_sg(struct device *dev, struct scatterlist *sglist, for_each_sg(sglist, sg, nents, i) { sg->dma_address = sg_phys(sg); - __dma_prep_pa_range(sg->dma_address, sg->length, direction); #ifdef CONFIG_NEED_SG_DMA_LENGTH sg->dma_length = sg->length; #endif + if (attrs & DMA_ATTR_SKIP_CPU_SYNC) + continue; + __dma_prep_pa_range(sg->dma_address, sg->length, direction); } return nents; @@ -232,6 +234,8 @@ static void tile_dma_unmap_sg(struct device *dev, struct scatterlist *sglist, BUG_ON(!valid_dma_direction(direction)); for_each_sg(sglist, sg, nents, i) { sg->dma_address = sg_phys(sg); + if (attrs & DMA_ATTR_SKIP_CPU_SYNC) + continue; __dma_complete_pa_range(sg->dma_address, sg->length, direction); } @@ -245,7 +249,8 @@ static dma_addr_t tile_dma_map_page(struct device *dev, struct page *page, BUG_ON(!valid_dma_direction(direction)); BUG_ON(offset + size > PAGE_SIZE); - __dma_prep_page(page, offset, size, direction); + if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) + __dma_prep_page(page, offset, size, direction); return page_to_pa(page) + offset; } @@ -256,6 +261,9 @@ static void tile_dma_unmap_page(struct device *dev, dma_addr_t dma_address, { BUG_ON(!valid_dma_direction(direction)); + if (attrs & DMA_ATTR_SKIP_CPU_SYNC) + return; + __dma_complete_page(pfn_to_page(PFN_DOWN(dma_address)), dma_address & (PAGE_SIZE - 1), size, direction); } diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c index 9475a74cd53a..bc6656b5708b 100644 --- a/arch/tile/kernel/pci.c +++ b/arch/tile/kernel/pci.c @@ -57,7 +57,7 @@ static int pci_probe = 1; * This flag tells if the platform is TILEmpower that needs * special configuration for the PLX switch chip. */ -int __write_once tile_plx_gen1; +int __ro_after_init tile_plx_gen1; static struct pci_controller controllers[TILE_NUM_PCIE]; static int num_controllers; diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c index 0e7a5d09e023..b554a68eea1b 100644 --- a/arch/tile/kernel/pci_gx.c +++ b/arch/tile/kernel/pci_gx.c @@ -131,7 +131,7 @@ static int tile_irq_cpu(int irq) count = cpumask_weight(&intr_cpus_map); if (unlikely(count == 0)) { - pr_warn("intr_cpus_map empty, interrupts will be delievered to dataplane tiles\n"); + pr_warn("intr_cpus_map empty, interrupts will be delivered to dataplane tiles\n"); return irq % (smp_height * smp_width); } diff --git a/arch/tile/kernel/process.c b/arch/tile/kernel/process.c index 9f37106ef93a..c84c54a1ac55 100644 --- a/arch/tile/kernel/process.c +++ b/arch/tile/kernel/process.c @@ -35,7 +35,7 @@ #include <asm/syscalls.h> #include <asm/traps.h> #include <asm/setup.h> -#include <asm/uaccess.h> +#include <linux/uaccess.h> #ifdef CONFIG_HARDWALL #include <asm/hardwall.h> #endif diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c index 153020abd2f5..443a70bccc1c 100644 --- a/arch/tile/kernel/setup.c +++ b/arch/tile/kernel/setup.c @@ -49,7 +49,7 @@ static inline int ABS(int x) { return x >= 0 ? x : -x; } /* Chip information */ -char chip_model[64] __write_once; +char chip_model[64] __ro_after_init; #ifdef CONFIG_VT struct screen_info screen_info; @@ -97,17 +97,17 @@ int node_controller[MAX_NUMNODES] = { [0 ... MAX_NUMNODES-1] = -1 }; #ifdef CONFIG_HIGHMEM /* Map information from VAs to PAs */ unsigned long pbase_map[1 << (32 - HPAGE_SHIFT)] - __write_once __attribute__((aligned(L2_CACHE_BYTES))); + __ro_after_init __attribute__((aligned(L2_CACHE_BYTES))); EXPORT_SYMBOL(pbase_map); /* Map information from PAs to VAs */ void *vbase_map[NR_PA_HIGHBIT_VALUES] - __write_once __attribute__((aligned(L2_CACHE_BYTES))); + __ro_after_init __attribute__((aligned(L2_CACHE_BYTES))); EXPORT_SYMBOL(vbase_map); #endif /* Node number as a function of the high PA bits */ -int highbits_to_node[NR_PA_HIGHBIT_VALUES] __write_once; +int highbits_to_node[NR_PA_HIGHBIT_VALUES] __ro_after_init; EXPORT_SYMBOL(highbits_to_node); static unsigned int __initdata maxmem_pfn = -1U; @@ -844,11 +844,11 @@ static void __init zone_sizes_init(void) #ifdef CONFIG_NUMA /* which logical CPUs are on which nodes */ -struct cpumask node_2_cpu_mask[MAX_NUMNODES] __write_once; +struct cpumask node_2_cpu_mask[MAX_NUMNODES] __ro_after_init; EXPORT_SYMBOL(node_2_cpu_mask); /* which node each logical CPU is on */ -char cpu_2_node[NR_CPUS] __write_once __attribute__((aligned(L2_CACHE_BYTES))); +char cpu_2_node[NR_CPUS] __ro_after_init __attribute__((aligned(L2_CACHE_BYTES))); EXPORT_SYMBOL(cpu_2_node); /* Return cpu_to_node() except for cpus not yet assigned, which return -1 */ @@ -1269,7 +1269,7 @@ static void __init validate_va(void) * cpus plus any other cpus that are willing to share their cache. * It is set by hv_inquire_tiles(HV_INQ_TILES_LOTAR). */ -struct cpumask __write_once cpu_lotar_map; +struct cpumask __ro_after_init cpu_lotar_map; EXPORT_SYMBOL(cpu_lotar_map); /* @@ -1291,7 +1291,7 @@ EXPORT_SYMBOL(hash_for_home_map); * cache, those tiles will only appear in cpu_lotar_map, NOT in * cpu_cacheable_map, as they are a special case. */ -struct cpumask __write_once cpu_cacheable_map; +struct cpumask __ro_after_init cpu_cacheable_map; EXPORT_SYMBOL(cpu_cacheable_map); static __initdata struct cpumask disabled_map; @@ -1506,7 +1506,7 @@ void __init setup_arch(char **cmdline_p) * Set up per-cpu memory. */ -unsigned long __per_cpu_offset[NR_CPUS] __write_once; +unsigned long __per_cpu_offset[NR_CPUS] __ro_after_init; EXPORT_SYMBOL(__per_cpu_offset); static size_t __initdata pfn_offset[MAX_NUMNODES] = { 0 }; diff --git a/arch/tile/kernel/single_step.c b/arch/tile/kernel/single_step.c index 862973074bf9..de3eae813e52 100644 --- a/arch/tile/kernel/single_step.c +++ b/arch/tile/kernel/single_step.c @@ -25,7 +25,7 @@ #include <linux/prctl.h> #include <asm/cacheflush.h> #include <asm/traps.h> -#include <asm/uaccess.h> +#include <linux/uaccess.h> #include <asm/unaligned.h> #include <arch/abi.h> #include <arch/spr_def.h> diff --git a/arch/tile/kernel/smp.c b/arch/tile/kernel/smp.c index 07e3ff5cc740..94a62e1197ce 100644 --- a/arch/tile/kernel/smp.c +++ b/arch/tile/kernel/smp.c @@ -27,7 +27,7 @@ * We write to width and height with a single store in head_NN.S, * so make the variable aligned to "long". */ -HV_Topology smp_topology __write_once __aligned(sizeof(long)); +HV_Topology smp_topology __ro_after_init __aligned(sizeof(long)); EXPORT_SYMBOL(smp_topology); #if CHIP_HAS_IPI() diff --git a/arch/tile/kernel/time.c b/arch/tile/kernel/time.c index ea960d660917..c9357012b1c8 100644 --- a/arch/tile/kernel/time.c +++ b/arch/tile/kernel/time.c @@ -37,7 +37,7 @@ */ /* How many cycles per second we are running at. */ -static cycles_t cycles_per_sec __write_once; +static cycles_t cycles_per_sec __ro_after_init; cycles_t get_clock_rate(void) { @@ -68,7 +68,7 @@ EXPORT_SYMBOL(get_cycles); */ #define SCHED_CLOCK_SHIFT 10 -static unsigned long sched_clock_mult __write_once; +static unsigned long sched_clock_mult __ro_after_init; static cycles_t clocksource_get_cycles(struct clocksource *cs) { diff --git a/arch/tile/kernel/unaligned.c b/arch/tile/kernel/unaligned.c index 9772a3554282..f229e979584e 100644 --- a/arch/tile/kernel/unaligned.c +++ b/arch/tile/kernel/unaligned.c @@ -22,12 +22,12 @@ #include <linux/mman.h> #include <linux/types.h> #include <linux/err.h> -#include <linux/module.h> +#include <linux/extable.h> #include <linux/compat.h> #include <linux/prctl.h> #include <asm/cacheflush.h> #include <asm/traps.h> -#include <asm/uaccess.h> +#include <linux/uaccess.h> #include <asm/unaligned.h> #include <arch/abi.h> #include <arch/spr_def.h> |