diff options
Diffstat (limited to 'arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-A11.dts')
-rw-r--r-- | arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-A11.dts | 205 |
1 files changed, 205 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-A11.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-A11.dts new file mode 100644 index 000000000000..021cc31cd9b2 --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-A11.dts @@ -0,0 +1,205 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2022 StarFive Technology Co., Ltd. + * Copyright (C) 2022 Hal Feng <hal.feng@starfivetech.com> + * For VisionFive2 version A1.1 + */ + +/dts-v1/; +#include "jh7110-starfive-visionfive-2.dtsi" + +/ { + model = "StarFive VisionFive V2"; + compatible = "starfive,visionfive-v2", "starfive,jh7110"; + + gpio-restart { + compatible = "gpio-restart"; + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + priority = <224>; + }; +}; + +&gpio { + uart0_pins: uart0-pins { + uart0-pins-tx { + starfive,pins = <PAD_GPIO5>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_DS(3))>; + starfive,pin-gpio-dout = <GPO_UART0_SOUT>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + + uart0-pins-rx { + starfive,pins = <PAD_GPIO6>; + starfive,pinmux = <PAD_GPIO6_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_PU(1))>; + starfive,pin-gpio-doen = <OEN_HIGH>; + starfive,pin-gpio-din = <GPI_UART0_SIN>; + }; + }; + + i2c2_pins: i2c2-pins { + i2c2-pins-scl { + starfive,pins = <PAD_GPIO3>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>; + starfive,pin-gpio-dout = <GPO_LOW>; + starfive,pin-gpio-doen = <OEN_I2C2_IC_CLK_OE>; + starfive,pin-gpio-din = <GPI_I2C2_IC_CLK_IN_A>; + }; + + i2c2-pins-sda { + starfive,pins = <PAD_GPIO2>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>; + starfive,pin-gpio-dout = <GPO_LOW>; + starfive,pin-gpio-doen = <OEN_I2C2_IC_DATA_OE>; + starfive,pin-gpio-din = <GPI_I2C2_IC_DATA_IN_A>; + }; + }; + + mmc0_pins: mmc0-pins { + mmc0-pins-rest { + starfive,pins = <PAD_GPIO62>; + starfive,pinmux = <PAD_GPIO62_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>; + starfive,pin-gpio-dout = <GPO_SDIO0_RST_N>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + }; + + sdcard1_pins: sdcard1-pins { + sdcard1-pins0 { + starfive,pins = <PAD_GPIO10>; + starfive,pinmux = <PAD_GPIO10_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)) | GPIO_DS(3))>; + starfive,pin-gpio-dout = <GPO_SDIO1_CCLK_OUT>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + + sdcard1-pins1 { + starfive,pins = <PAD_GPIO9>; + starfive,pinmux = <PAD_GPIO9_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)) | GPIO_DS(3))>; + starfive,pin-gpio-dout = <GPO_SDIO1_CCMD_OUT>; + starfive,pin-gpio-doen = <OEN_SDIO1_CCMD_OUT_EN>; + starfive,pin-gpio-din = <GPI_SDIO1_CCMD_IN>; + }; + + sdcard1-pins2 { + starfive,pins = <PAD_GPIO11>; + starfive,pinmux = <PAD_GPIO11_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)) | GPIO_DS(3))>; + starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_0>; + starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_0>; + starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_0>; + }; + + sdcard1-pins3 { + starfive,pins = <PAD_GPIO12>; + starfive,pinmux = <PAD_GPIO12_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)) | GPIO_DS(3))>; + starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_1>; + starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_1>; + starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_1>; + }; + + sdcard1-pins4 { + starfive,pins = <PAD_GPIO7>; + starfive,pinmux = <PAD_GPIO7_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)) | GPIO_DS(3))>; + starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_2>; + starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_2>; + starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_2>; + }; + + sdcard1-pins5 { + starfive,pins = <PAD_GPIO8>; + starfive,pinmux = <PAD_GPIO8_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)) | GPIO_DS(3))>; + starfive,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_3>; + starfive,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_3>; + starfive,pin-gpio-din = <GPI_SDIO1_CDATA_IN_3>; + }; + }; + + inno_hdmi_pins: inno_hdmi-pins { + inno_hdmi-scl { + starfive,pins = <PAD_GPIO0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>; + starfive,pin-gpio-dout = <GPO_HDMI0_DDC_SCL_OUT>; + starfive,pin-gpio-doen = <OEN_HDMI0_DDC_SCL_OEN>; + starfive,pin-gpio-din = <GPI_HDMI0_DDC_SCL_IN>; + }; + + inno_hdmi-sda { + starfive,pins = <PAD_GPIO1>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>; + starfive,pin-gpio-dout = <GPO_HDMI0_DDC_SDA_OUT>; + starfive,pin-gpio-doen = <OEN_HDMI0_DDC_SDA_OEN>; + starfive,pin-gpio-din = <GPI_HDMI0_DDC_SDA_IN>; + }; + + inno_hdmi-cec-pins { + starfive,pins = <PAD_GPIO14>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>; + starfive,pin-gpio-doen = <OEN_HDMI0_CEC_SDA_OEN>; + starfive,pin-gpio-dout = <GPO_HDMI0_CEC_SDA_OUT>; + starfive,pin-gpio-din = <GPI_HDMI0_CEC_SDA_IN>; + }; + + inno_hdmi-hpd-pins { + starfive,pins = <PAD_GPIO15>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-doen = <OEN_HIGH>; + starfive,pin-gpio-din = <GPI_HDMI0_HPD>; + }; + }; + + pcie0_vbus_default: pcie0_vbus_default { + drive-vbus-pin { + starfive,pins = <PAD_GPIO25>; + starfive,pinmux = <PAD_GPIO25_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-dout = <GPO_HIGH>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + status = "okay"; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&sdcard1_pins>; + status = "okay"; +}; + +&hdmi { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&inno_hdmi_pins>; +}; + +&pcie0 { + pinctrl-names = "default", "perst-default", "perst-active"; + pinctrl-0 = <&pcie0_wake_default>, + <&pcie0_clkreq_default>, + <&pcie0_vbus_default>; + pinctrl-1 = <&pcie0_perst_default>; + pinctrl-2 = <&pcie0_perst_active>; + status = "okay"; +}; |