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-rw-r--r--arch/mips/include/asm/cpu-features.h3
-rw-r--r--arch/mips/include/asm/cpu-type.h6
-rw-r--r--arch/mips/include/asm/cpu.h6
-rw-r--r--arch/mips/include/asm/isadep.h2
-rw-r--r--arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-dec/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-ingenic/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-loongson2ef/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-ralink/mt7620/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h1
-rw-r--r--arch/mips/include/asm/mach-tx39xx/ioremap.h25
-rw-r--r--arch/mips/include/asm/mach-tx39xx/mangle-port.h24
-rw-r--r--arch/mips/include/asm/mach-tx39xx/spaces.h17
-rw-r--r--arch/mips/include/asm/stackframe.h6
-rw-r--r--arch/mips/include/asm/txx9/boards.h3
-rw-r--r--arch/mips/include/asm/txx9/jmr3927.h179
-rw-r--r--arch/mips/include/asm/txx9/tx3927.h341
-rw-r--r--arch/mips/include/asm/txx9irq.h4
-rw-r--r--arch/mips/include/asm/txx9tmr.h4
-rw-r--r--arch/mips/include/asm/vermagic.h2
33 files changed, 4 insertions, 637 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 3d71081afc55..de8cb2ccb781 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -120,9 +120,6 @@
#ifndef cpu_has_4k_cache
#define cpu_has_4k_cache __isa_ge_or_opt(1, MIPS_CPU_4K_CACHE)
#endif
-#ifndef cpu_has_tx39_cache
-#define cpu_has_tx39_cache __opt(MIPS_CPU_TX39_CACHE)
-#endif
#ifndef cpu_has_octeon_cache
#define cpu_has_octeon_cache 0
#endif
diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index 5efe8c8b854e..5582ff0c247e 100644
--- a/arch/mips/include/asm/cpu-type.h
+++ b/arch/mips/include/asm/cpu-type.h
@@ -105,12 +105,6 @@ static inline int __pure __get_cpu_type(const int cpu_type)
case CPU_R3081E:
#endif
-#ifdef CONFIG_SYS_HAS_CPU_TX39XX
- case CPU_TX3912:
- case CPU_TX3922:
- case CPU_TX3927:
-#endif
-
#ifdef CONFIG_SYS_HAS_CPU_VR41XX
case CPU_VR41XX:
case CPU_VR4111:
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 5c2f8d9cb7cf..00a3fc7d778d 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -310,11 +310,6 @@ enum cpu_type_enum {
CPU_SR71000, CPU_TX49XX,
/*
- * TX3900 class processors
- */
- CPU_TX3912, CPU_TX3922, CPU_TX3927,
-
- /*
* MIPS32 class processors
*/
CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
@@ -367,7 +362,6 @@ enum cpu_type_enum {
#define MIPS_CPU_4KEX BIT_ULL( 1) /* "R4K" exception model */
#define MIPS_CPU_3K_CACHE BIT_ULL( 2) /* R3000-style caches */
#define MIPS_CPU_4K_CACHE BIT_ULL( 3) /* R4000-style caches */
-#define MIPS_CPU_TX39_CACHE BIT_ULL( 4) /* TX3900-style caches */
#define MIPS_CPU_FPU BIT_ULL( 5) /* CPU has FPU */
#define MIPS_CPU_32FPR BIT_ULL( 6) /* 32 dbl. prec. FP registers */
#define MIPS_CPU_COUNTER BIT_ULL( 7) /* Cycle count/compare */
diff --git a/arch/mips/include/asm/isadep.h b/arch/mips/include/asm/isadep.h
index d1683202399b..8fc1e3ae8d0c 100644
--- a/arch/mips/include/asm/isadep.h
+++ b/arch/mips/include/asm/isadep.h
@@ -10,7 +10,7 @@
#ifndef __ASM_ISADEP_H
#define __ASM_ISADEP_H
-#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
+#if defined(CONFIG_CPU_R3000)
/*
* R2000 or R3000
*/
diff --git a/arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h
index a54f20d956a2..ec3604c44ef2 100644
--- a/arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h
@@ -18,7 +18,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_sb1_cache 0
#define cpu_has_fpu 0
#define cpu_has_32fpr 0
diff --git a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
index 79ab3ad9fee8..44fd44a5fc42 100644
--- a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
@@ -16,7 +16,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_sb1_cache 0
#define cpu_has_fpu 0
#define cpu_has_32fpr 0
diff --git a/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h b/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
index e6e527224a15..3c200303ae55 100644
--- a/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
@@ -21,7 +21,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_fpu 0
#define cpu_has_32fpr 0
#define cpu_has_counter 1
diff --git a/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h b/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h
index b23ff47ea475..69899c1e122d 100644
--- a/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h
@@ -6,7 +6,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_fpu 0
#define cpu_has_32fpr 0
#define cpu_has_counter 1
diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
index 513270c8adb9..9151dcd9d0d5 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
@@ -21,7 +21,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 0
-#define cpu_has_tx39_cache 0
#define cpu_has_counter 1
#define cpu_has_watch 1
#define cpu_has_divec 1
diff --git a/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
index 291fe90aafa5..03192458471d 100644
--- a/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
@@ -13,7 +13,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_32fpr 1
#define cpu_has_counter 1
#define cpu_has_watch 0
diff --git a/arch/mips/include/asm/mach-dec/cpu-feature-overrides.h b/arch/mips/include/asm/mach-dec/cpu-feature-overrides.h
index 1896e88f6000..3ddc4b4dca26 100644
--- a/arch/mips/include/asm/mach-dec/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-dec/cpu-feature-overrides.h
@@ -17,7 +17,6 @@
#define cpu_has_rixiex 0
#define cpu_has_maar 0
#define cpu_has_rw_llb 0
-#define cpu_has_tx39_cache 0
#define cpu_has_divec 0
#define cpu_has_prefetch 0
#define cpu_has_mcheck 0
diff --git a/arch/mips/include/asm/mach-ingenic/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ingenic/cpu-feature-overrides.h
index 7c5e576f9d96..7ace50127f5a 100644
--- a/arch/mips/include/asm/mach-ingenic/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ingenic/cpu-feature-overrides.h
@@ -11,7 +11,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_counter 0
#define cpu_has_watch 1
#define cpu_has_divec 1
diff --git a/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
index 58f829c9b6c7..c8385c4e8664 100644
--- a/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
@@ -25,7 +25,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_fpu 1
#define cpu_has_nofpuex 0
#define cpu_has_32fpr 1
diff --git a/arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h
index 49a93e82c252..8ad0c424a9af 100644
--- a/arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h
@@ -28,7 +28,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_fpu 1
#define cpu_has_nofpuex 0
#define cpu_has_32fpr 1
diff --git a/arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h
index 10226976f7b7..22607e61e57b 100644
--- a/arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h
@@ -15,7 +15,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_sb1_cache 0
#define cpu_has_fpu 0
#define cpu_has_32fpr 0
diff --git a/arch/mips/include/asm/mach-loongson2ef/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson2ef/cpu-feature-overrides.h
index b2ee859ca0b7..eb0d1cfb9f3b 100644
--- a/arch/mips/include/asm/mach-loongson2ef/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-loongson2ef/cpu-feature-overrides.h
@@ -34,7 +34,6 @@
#define cpu_has_mipsmt 0
#define cpu_has_smartmips 0
#define cpu_has_tlb 1
-#define cpu_has_tx39_cache 0
#define cpu_has_vce 0
#define cpu_has_veic 0
#define cpu_has_vint 0
diff --git a/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h
index eb181224eb4c..ebace9e4bdc1 100644
--- a/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h
@@ -36,7 +36,6 @@
#define cpu_has_mipsmt 0
#define cpu_has_smartmips 0
#define cpu_has_tlb 1
-#define cpu_has_tx39_cache 0
#define cpu_has_vce 0
#define cpu_has_veic 0
#define cpu_has_vint 0
diff --git a/arch/mips/include/asm/mach-ralink/mt7620/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ralink/mt7620/cpu-feature-overrides.h
index c4579f1705c2..85a62c99a52a 100644
--- a/arch/mips/include/asm/mach-ralink/mt7620/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ralink/mt7620/cpu-feature-overrides.h
@@ -16,7 +16,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_sb1_cache 0
#define cpu_has_fpu 0
#define cpu_has_32fpr 0
diff --git a/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h
index 168359a0a58d..3c19a94f5432 100644
--- a/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h
@@ -17,7 +17,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_sb1_cache 0
#define cpu_has_fpu 0
#define cpu_has_32fpr 0
diff --git a/arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h
index fdaf8c9182bc..a850c1e46134 100644
--- a/arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h
@@ -16,7 +16,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_sb1_cache 0
#define cpu_has_fpu 0
#define cpu_has_32fpr 0
diff --git a/arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h
index 7a385fe784a6..2d75264a9166 100644
--- a/arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h
@@ -16,7 +16,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_sb1_cache 0
#define cpu_has_fpu 0
#define cpu_has_32fpr 0
diff --git a/arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h
index 0a61910f6521..accf2a325343 100644
--- a/arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h
@@ -15,7 +15,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_sb1_cache 0
#define cpu_has_fpu 0
#define cpu_has_32fpr 0
diff --git a/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h b/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
index 8539ccfb69b7..36d45c9cf09c 100644
--- a/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
@@ -18,7 +18,6 @@
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
-#define cpu_has_tx39_cache 0
#define cpu_has_sb1_cache 0
#define cpu_has_fpu 0
#define cpu_has_32fpr 0
diff --git a/arch/mips/include/asm/mach-tx39xx/ioremap.h b/arch/mips/include/asm/mach-tx39xx/ioremap.h
deleted file mode 100644
index 157a7292397e..000000000000
--- a/arch/mips/include/asm/mach-tx39xx/ioremap.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * include/asm-mips/mach-tx39xx/ioremap.h
- */
-#ifndef __ASM_MACH_TX39XX_IOREMAP_H
-#define __ASM_MACH_TX39XX_IOREMAP_H
-
-#include <linux/types.h>
-
-static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size,
- unsigned long flags)
-{
-#define TXX9_DIRECTMAP_BASE 0xff000000ul
- if (offset >= TXX9_DIRECTMAP_BASE &&
- offset < TXX9_DIRECTMAP_BASE + 0xff0000)
- return (void __iomem *)offset;
- return NULL;
-}
-
-static inline int plat_iounmap(const volatile void __iomem *addr)
-{
- return (unsigned long)addr >= TXX9_DIRECTMAP_BASE;
-}
-
-#endif /* __ASM_MACH_TX39XX_IOREMAP_H */
diff --git a/arch/mips/include/asm/mach-tx39xx/mangle-port.h b/arch/mips/include/asm/mach-tx39xx/mangle-port.h
deleted file mode 100644
index 95be459950f7..000000000000
--- a/arch/mips/include/asm/mach-tx39xx/mangle-port.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_TX39XX_MANGLE_PORT_H
-#define __ASM_MACH_TX39XX_MANGLE_PORT_H
-
-#if defined(CONFIG_TOSHIBA_JMR3927)
-extern unsigned long (*__swizzle_addr_b)(unsigned long port);
-#define NEEDS_TXX9_SWIZZLE_ADDR_B
-#else
-#define __swizzle_addr_b(port) (port)
-#endif
-#define __swizzle_addr_w(port) (port)
-#define __swizzle_addr_l(port) (port)
-#define __swizzle_addr_q(port) (port)
-
-#define ioswabb(a, x) (x)
-#define __mem_ioswabb(a, x) (x)
-#define ioswabw(a, x) le16_to_cpu((__force __le16)(x))
-#define __mem_ioswabw(a, x) (x)
-#define ioswabl(a, x) le32_to_cpu((__force __le32)(x))
-#define __mem_ioswabl(a, x) (x)
-#define ioswabq(a, x) le64_to_cpu((__force __le64)(x))
-#define __mem_ioswabq(a, x) (x)
-
-#endif /* __ASM_MACH_TX39XX_MANGLE_PORT_H */
diff --git a/arch/mips/include/asm/mach-tx39xx/spaces.h b/arch/mips/include/asm/mach-tx39xx/spaces.h
deleted file mode 100644
index 151fe7a1cf1d..000000000000
--- a/arch/mips/include/asm/mach-tx39xx/spaces.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
- * Copyright (C) 2000, 2002 Maciej W. Rozycki
- * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_TX39XX_SPACES_H
-#define _ASM_TX39XX_SPACES_H
-
-#define FIXADDR_TOP ((unsigned long)(long)(int)0xfefe0000)
-
-#include <asm/mach-generic/spaces.h>
-
-#endif /* __ASM_TX39XX_SPACES_H */
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index aa430a6c68b2..a8705aef47e1 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -42,7 +42,7 @@
cfi_restore \reg \offset \docfi
.endm
-#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
+#if defined(CONFIG_CPU_R3000)
#define STATMASK 0x3f
#else
#define STATMASK 0x1f
@@ -349,7 +349,7 @@
cfi_ld sp, PT_R29, \docfi
.endm
-#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
+#if defined(CONFIG_CPU_R3000)
.macro RESTORE_SOME docfi=0
.set push
@@ -478,7 +478,7 @@
.macro KMODE
mfc0 t0, CP0_STATUS
li t1, ST0_KERNEL_CUMASK | (STATMASK & ~1)
-#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
+#if defined(CONFIG_CPU_R3000)
andi t2, t0, ST0_IEP
srl t2, 2
or t0, t2
diff --git a/arch/mips/include/asm/txx9/boards.h b/arch/mips/include/asm/txx9/boards.h
index 70284e90dc53..6897ca4366d5 100644
--- a/arch/mips/include/asm/txx9/boards.h
+++ b/arch/mips/include/asm/txx9/boards.h
@@ -1,7 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0 */
-#ifdef CONFIG_TOSHIBA_JMR3927
-BOARD_VEC(jmr3927_vec)
-#endif
#ifdef CONFIG_TOSHIBA_RBTX4927
BOARD_VEC(rbtx4927_vec)
BOARD_VEC(rbtx4937_vec)
diff --git a/arch/mips/include/asm/txx9/jmr3927.h b/arch/mips/include/asm/txx9/jmr3927.h
deleted file mode 100644
index aab959dc30ba..000000000000
--- a/arch/mips/include/asm/txx9/jmr3927.h
+++ /dev/null
@@ -1,179 +0,0 @@
-/*
- * Defines for the TJSYS JMR-TX3927
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- */
-#ifndef __ASM_TXX9_JMR3927_H
-#define __ASM_TXX9_JMR3927_H
-
-#include <asm/txx9/tx3927.h>
-#include <asm/addrspace.h>
-#include <asm/txx9irq.h>
-
-/* CS */
-#define JMR3927_ROMCE0 0x1fc00000 /* 4M */
-#define JMR3927_ROMCE1 0x1e000000 /* 4M */
-#define JMR3927_ROMCE2 0x14000000 /* 16M */
-#define JMR3927_ROMCE3 0x10000000 /* 64M */
-#define JMR3927_ROMCE5 0x1d000000 /* 4M */
-#define JMR3927_SDCS0 0x00000000 /* 32M */
-#define JMR3927_SDCS1 0x02000000 /* 32M */
-/* PCI Direct Mappings */
-
-#define JMR3927_PCIMEM 0x08000000
-#define JMR3927_PCIMEM_SIZE 0x08000000 /* 128M */
-#define JMR3927_PCIIO 0x15000000
-#define JMR3927_PCIIO_SIZE 0x01000000 /* 16M */
-
-#define JMR3927_SDRAM_SIZE 0x02000000 /* 32M */
-#define JMR3927_PORT_BASE KSEG1
-
-/* Address map (virtual address) */
-#define JMR3927_ROM0_BASE (KSEG1 + JMR3927_ROMCE0)
-#define JMR3927_ROM1_BASE (KSEG1 + JMR3927_ROMCE1)
-#define JMR3927_IOC_BASE (KSEG1 + JMR3927_ROMCE2)
-#define JMR3927_PCIMEM_BASE (KSEG1 + JMR3927_PCIMEM)
-#define JMR3927_PCIIO_BASE (KSEG1 + JMR3927_PCIIO)
-
-#define JMR3927_IOC_REV_ADDR (JMR3927_IOC_BASE + 0x00000000)
-#define JMR3927_IOC_NVRAMB_ADDR (JMR3927_IOC_BASE + 0x00010000)
-#define JMR3927_IOC_LED_ADDR (JMR3927_IOC_BASE + 0x00020000)
-#define JMR3927_IOC_DIPSW_ADDR (JMR3927_IOC_BASE + 0x00030000)
-#define JMR3927_IOC_BREV_ADDR (JMR3927_IOC_BASE + 0x00040000)
-#define JMR3927_IOC_DTR_ADDR (JMR3927_IOC_BASE + 0x00050000)
-#define JMR3927_IOC_INTS1_ADDR (JMR3927_IOC_BASE + 0x00080000)
-#define JMR3927_IOC_INTS2_ADDR (JMR3927_IOC_BASE + 0x00090000)
-#define JMR3927_IOC_INTM_ADDR (JMR3927_IOC_BASE + 0x000a0000)
-#define JMR3927_IOC_INTP_ADDR (JMR3927_IOC_BASE + 0x000b0000)
-#define JMR3927_IOC_RESET_ADDR (JMR3927_IOC_BASE + 0x000f0000)
-
-/* Flash ROM */
-#define JMR3927_FLASH_BASE (JMR3927_ROM0_BASE)
-#define JMR3927_FLASH_SIZE 0x00400000
-
-/* bits for IOC_REV/IOC_BREV (high byte) */
-#define JMR3927_IDT_MASK 0xfc
-#define JMR3927_REV_MASK 0x03
-#define JMR3927_IOC_IDT 0xe0
-
-/* bits for IOC_INTS1/IOC_INTS2/IOC_INTM/IOC_INTP (high byte) */
-#define JMR3927_IOC_INTB_PCIA 0
-#define JMR3927_IOC_INTB_PCIB 1
-#define JMR3927_IOC_INTB_PCIC 2
-#define JMR3927_IOC_INTB_PCID 3
-#define JMR3927_IOC_INTB_MODEM 4
-#define JMR3927_IOC_INTB_INT6 5
-#define JMR3927_IOC_INTB_INT7 6
-#define JMR3927_IOC_INTB_SOFT 7
-#define JMR3927_IOC_INTF_PCIA (1 << JMR3927_IOC_INTF_PCIA)
-#define JMR3927_IOC_INTF_PCIB (1 << JMR3927_IOC_INTB_PCIB)
-#define JMR3927_IOC_INTF_PCIC (1 << JMR3927_IOC_INTB_PCIC)
-#define JMR3927_IOC_INTF_PCID (1 << JMR3927_IOC_INTB_PCID)
-#define JMR3927_IOC_INTF_MODEM (1 << JMR3927_IOC_INTB_MODEM)
-#define JMR3927_IOC_INTF_INT6 (1 << JMR3927_IOC_INTB_INT6)
-#define JMR3927_IOC_INTF_INT7 (1 << JMR3927_IOC_INTB_INT7)
-#define JMR3927_IOC_INTF_SOFT (1 << JMR3927_IOC_INTB_SOFT)
-
-/* bits for IOC_RESET (high byte) */
-#define JMR3927_IOC_RESET_CPU 1
-#define JMR3927_IOC_RESET_PCI 2
-
-#if defined(__BIG_ENDIAN)
-#define jmr3927_ioc_reg_out(d, a) ((*(volatile unsigned char *)(a)) = (d))
-#define jmr3927_ioc_reg_in(a) (*(volatile unsigned char *)(a))
-#elif defined(__LITTLE_ENDIAN)
-#define jmr3927_ioc_reg_out(d, a) ((*(volatile unsigned char *)((a)^1)) = (d))
-#define jmr3927_ioc_reg_in(a) (*(volatile unsigned char *)((a)^1))
-#else
-#error "No Endian"
-#endif
-
-/* LED macro */
-#define jmr3927_led_set(n/*0-16*/) jmr3927_ioc_reg_out(~(n), JMR3927_IOC_LED_ADDR)
-
-#define jmr3927_led_and_set(n/*0-16*/) jmr3927_ioc_reg_out((~(n)) & jmr3927_ioc_reg_in(JMR3927_IOC_LED_ADDR), JMR3927_IOC_LED_ADDR)
-
-/* DIPSW4 macro */
-#define jmr3927_dipsw1() (gpio_get_value(11) == 0)
-#define jmr3927_dipsw2() (gpio_get_value(10) == 0)
-#define jmr3927_dipsw3() ((jmr3927_ioc_reg_in(JMR3927_IOC_DIPSW_ADDR) & 2) == 0)
-#define jmr3927_dipsw4() ((jmr3927_ioc_reg_in(JMR3927_IOC_DIPSW_ADDR) & 1) == 0)
-
-/*
- * IRQ mappings
- */
-
-/* These are the virtual IRQ numbers, we divide all IRQ's into
- * 'spaces', the 'space' determines where and how to enable/disable
- * that particular IRQ on an JMR machine. Add new 'spaces' as new
- * IRQ hardware is supported.
- */
-#define JMR3927_NR_IRQ_IRC 16 /* On-Chip IRC */
-#define JMR3927_NR_IRQ_IOC 8 /* PCI/MODEM/INT[6:7] */
-
-#define JMR3927_IRQ_IRC TXX9_IRQ_BASE
-#define JMR3927_IRQ_IOC (JMR3927_IRQ_IRC + JMR3927_NR_IRQ_IRC)
-#define JMR3927_IRQ_END (JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC)
-
-#define JMR3927_IRQ_IRC_INT0 (JMR3927_IRQ_IRC + TX3927_IR_INT0)
-#define JMR3927_IRQ_IRC_INT1 (JMR3927_IRQ_IRC + TX3927_IR_INT1)
-#define JMR3927_IRQ_IRC_INT2 (JMR3927_IRQ_IRC + TX3927_IR_INT2)
-#define JMR3927_IRQ_IRC_INT3 (JMR3927_IRQ_IRC + TX3927_IR_INT3)
-#define JMR3927_IRQ_IRC_INT4 (JMR3927_IRQ_IRC + TX3927_IR_INT4)
-#define JMR3927_IRQ_IRC_INT5 (JMR3927_IRQ_IRC + TX3927_IR_INT5)
-#define JMR3927_IRQ_IRC_SIO0 (JMR3927_IRQ_IRC + TX3927_IR_SIO0)
-#define JMR3927_IRQ_IRC_SIO1 (JMR3927_IRQ_IRC + TX3927_IR_SIO1)
-#define JMR3927_IRQ_IRC_SIO(ch) (JMR3927_IRQ_IRC + TX3927_IR_SIO(ch))
-#define JMR3927_IRQ_IRC_DMA (JMR3927_IRQ_IRC + TX3927_IR_DMA)
-#define JMR3927_IRQ_IRC_PIO (JMR3927_IRQ_IRC + TX3927_IR_PIO)
-#define JMR3927_IRQ_IRC_PCI (JMR3927_IRQ_IRC + TX3927_IR_PCI)
-#define JMR3927_IRQ_IRC_TMR(ch) (JMR3927_IRQ_IRC + TX3927_IR_TMR(ch))
-#define JMR3927_IRQ_IOC_PCIA (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIA)
-#define JMR3927_IRQ_IOC_PCIB (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIB)
-#define JMR3927_IRQ_IOC_PCIC (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIC)
-#define JMR3927_IRQ_IOC_PCID (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCID)
-#define JMR3927_IRQ_IOC_MODEM (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_MODEM)
-#define JMR3927_IRQ_IOC_INT6 (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_INT6)
-#define JMR3927_IRQ_IOC_INT7 (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_INT7)
-#define JMR3927_IRQ_IOC_SOFT (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_SOFT)
-
-/* IOC (PCI, MODEM) */
-#define JMR3927_IRQ_IOCINT JMR3927_IRQ_IRC_INT1
-/* TC35815 100M Ether (JMR-TX3912:JPW4:2-3 Short) */
-#define JMR3927_IRQ_ETHER0 JMR3927_IRQ_IRC_INT3
-
-/* Clocks */
-#define JMR3927_CORECLK 132710400 /* 132.7MHz */
-
-/*
- * TX3927 Pin Configuration:
- *
- * PCFG bits Avail Dead
- * SELSIO[1:0]:11 RXD[1:0], TXD[1:0] PIO[6:3]
- * SELSIOC[0]:1 CTS[0], RTS[0] INT[5:4]
- * SELSIOC[1]:0,SELDSF:0, GSDAO[0],GPCST[3] CTS[1], RTS[1],DSF,
- * GDBGE* PIO[2:1]
- * SELDMA[2]:1 DMAREQ[2],DMAACK[2] PIO[13:12]
- * SELTMR[2:0]:000 TIMER[1:0]
- * SELCS:0,SELDMA[1]:0 PIO[11;10] SDCS_CE[7:6],
- * DMAREQ[1],DMAACK[1]
- * SELDMA[0]:1 DMAREQ[0],DMAACK[0] PIO[9:8]
- * SELDMA[3]:1 DMAREQ[3],DMAACK[3] PIO[15:14]
- * SELDONE:1 DMADONE PIO[7]
- *
- * Usable pins are:
- * RXD[1;0],TXD[1:0],CTS[0],RTS[0],
- * DMAREQ[0,2,3],DMAACK[0,2,3],DMADONE,PIO[0,10,11]
- * INT[3:0]
- */
-
-void jmr3927_prom_init(void);
-void jmr3927_irq_setup(void);
-struct pci_dev;
-int jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
-
-#endif /* __ASM_TXX9_JMR3927_H */
diff --git a/arch/mips/include/asm/txx9/tx3927.h b/arch/mips/include/asm/txx9/tx3927.h
deleted file mode 100644
index 149fab4f8327..000000000000
--- a/arch/mips/include/asm/txx9/tx3927.h
+++ /dev/null
@@ -1,341 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Toshiba Corporation
- */
-#ifndef __ASM_TXX9_TX3927_H
-#define __ASM_TXX9_TX3927_H
-
-#define TX3927_REG_BASE 0xfffe0000UL
-#define TX3927_REG_SIZE 0x00010000
-#define TX3927_SDRAMC_REG (TX3927_REG_BASE + 0x8000)
-#define TX3927_ROMC_REG (TX3927_REG_BASE + 0x9000)
-#define TX3927_DMA_REG (TX3927_REG_BASE + 0xb000)
-#define TX3927_IRC_REG (TX3927_REG_BASE + 0xc000)
-#define TX3927_PCIC_REG (TX3927_REG_BASE + 0xd000)
-#define TX3927_CCFG_REG (TX3927_REG_BASE + 0xe000)
-#define TX3927_NR_TMR 3
-#define TX3927_TMR_REG(ch) (TX3927_REG_BASE + 0xf000 + (ch) * 0x100)
-#define TX3927_NR_SIO 2
-#define TX3927_SIO_REG(ch) (TX3927_REG_BASE + 0xf300 + (ch) * 0x100)
-#define TX3927_PIO_REG (TX3927_REG_BASE + 0xf500)
-
-struct tx3927_sdramc_reg {
- volatile unsigned long cr[8];
- volatile unsigned long tr[3];
- volatile unsigned long cmd;
- volatile unsigned long smrs[2];
-};
-
-struct tx3927_romc_reg {
- volatile unsigned long cr[8];
-};
-
-struct tx3927_dma_reg {
- struct tx3927_dma_ch_reg {
- volatile unsigned long cha;
- volatile unsigned long sar;
- volatile unsigned long dar;
- volatile unsigned long cntr;
- volatile unsigned long sair;
- volatile unsigned long dair;
- volatile unsigned long ccr;
- volatile unsigned long csr;
- } ch[4];
- volatile unsigned long dbr[8];
- volatile unsigned long tdhr;
- volatile unsigned long mcr;
- volatile unsigned long unused0;
-};
-
-#include <asm/byteorder.h>
-
-#ifdef __BIG_ENDIAN
-#define endian_def_s2(e1, e2) \
- volatile unsigned short e1, e2
-#define endian_def_sb2(e1, e2, e3) \
- volatile unsigned short e1;volatile unsigned char e2, e3
-#define endian_def_b2s(e1, e2, e3) \
- volatile unsigned char e1, e2;volatile unsigned short e3
-#define endian_def_b4(e1, e2, e3, e4) \
- volatile unsigned char e1, e2, e3, e4
-#else
-#define endian_def_s2(e1, e2) \
- volatile unsigned short e2, e1
-#define endian_def_sb2(e1, e2, e3) \
- volatile unsigned char e3, e2;volatile unsigned short e1
-#define endian_def_b2s(e1, e2, e3) \
- volatile unsigned short e3;volatile unsigned char e2, e1
-#define endian_def_b4(e1, e2, e3, e4) \
- volatile unsigned char e4, e3, e2, e1
-#endif
-
-struct tx3927_pcic_reg {
- endian_def_s2(did, vid);
- endian_def_s2(pcistat, pcicmd);
- endian_def_b4(cc, scc, rpli, rid);
- endian_def_b4(unused0, ht, mlt, cls);
- volatile unsigned long ioba; /* +10 */
- volatile unsigned long mba;
- volatile unsigned long unused1[5];
- endian_def_s2(svid, ssvid);
- volatile unsigned long unused2; /* +30 */
- endian_def_sb2(unused3, unused4, capptr);
- volatile unsigned long unused5;
- endian_def_b4(ml, mg, ip, il);
- volatile unsigned long unused6; /* +40 */
- volatile unsigned long istat;
- volatile unsigned long iim;
- volatile unsigned long rrt;
- volatile unsigned long unused7[3]; /* +50 */
- volatile unsigned long ipbmma;
- volatile unsigned long ipbioma; /* +60 */
- volatile unsigned long ilbmma;
- volatile unsigned long ilbioma;
- volatile unsigned long unused8[9];
- volatile unsigned long tc; /* +90 */
- volatile unsigned long tstat;
- volatile unsigned long tim;
- volatile unsigned long tccmd;
- volatile unsigned long pcirrt; /* +a0 */
- volatile unsigned long pcirrt_cmd;
- volatile unsigned long pcirrdt;
- volatile unsigned long unused9[3];
- volatile unsigned long tlboap;
- volatile unsigned long tlbiap;
- volatile unsigned long tlbmma; /* +c0 */
- volatile unsigned long tlbioma;
- volatile unsigned long sc_msg;
- volatile unsigned long sc_be;
- volatile unsigned long tbl; /* +d0 */
- volatile unsigned long unused10[3];
- volatile unsigned long pwmng; /* +e0 */
- volatile unsigned long pwmngs;
- volatile unsigned long unused11[6];
- volatile unsigned long req_trace; /* +100 */
- volatile unsigned long pbapmc;
- volatile unsigned long pbapms;
- volatile unsigned long pbapmim;
- volatile unsigned long bm; /* +110 */
- volatile unsigned long cpcibrs;
- volatile unsigned long cpcibgs;
- volatile unsigned long pbacs;
- volatile unsigned long iobas; /* +120 */
- volatile unsigned long mbas;
- volatile unsigned long lbc;
- volatile unsigned long lbstat;
- volatile unsigned long lbim; /* +130 */
- volatile unsigned long pcistatim;
- volatile unsigned long ica;
- volatile unsigned long icd;
- volatile unsigned long iiadp; /* +140 */
- volatile unsigned long iscdp;
- volatile unsigned long mmas;
- volatile unsigned long iomas;
- volatile unsigned long ipciaddr; /* +150 */
- volatile unsigned long ipcidata;
- volatile unsigned long ipcibe;
-};
-
-struct tx3927_ccfg_reg {
- volatile unsigned long ccfg;
- volatile unsigned long crir;
- volatile unsigned long pcfg;
- volatile unsigned long tear;
- volatile unsigned long pdcr;
-};
-
-/*
- * SDRAMC
- */
-
-/*
- * ROMC
- */
-
-/*
- * DMA
- */
-/* bits for MCR */
-#define TX3927_DMA_MCR_EIS(ch) (0x10000000<<(ch))
-#define TX3927_DMA_MCR_DIS(ch) (0x01000000<<(ch))
-#define TX3927_DMA_MCR_RSFIF 0x00000080
-#define TX3927_DMA_MCR_FIFUM(ch) (0x00000008<<(ch))
-#define TX3927_DMA_MCR_LE 0x00000004
-#define TX3927_DMA_MCR_RPRT 0x00000002
-#define TX3927_DMA_MCR_MSTEN 0x00000001
-
-/* bits for CCRn */
-#define TX3927_DMA_CCR_DBINH 0x04000000
-#define TX3927_DMA_CCR_SBINH 0x02000000
-#define TX3927_DMA_CCR_CHRST 0x01000000
-#define TX3927_DMA_CCR_RVBYTE 0x00800000
-#define TX3927_DMA_CCR_ACKPOL 0x00400000
-#define TX3927_DMA_CCR_REQPL 0x00200000
-#define TX3927_DMA_CCR_EGREQ 0x00100000
-#define TX3927_DMA_CCR_CHDN 0x00080000
-#define TX3927_DMA_CCR_DNCTL 0x00060000
-#define TX3927_DMA_CCR_EXTRQ 0x00010000
-#define TX3927_DMA_CCR_INTRQD 0x0000e000
-#define TX3927_DMA_CCR_INTENE 0x00001000
-#define TX3927_DMA_CCR_INTENC 0x00000800
-#define TX3927_DMA_CCR_INTENT 0x00000400
-#define TX3927_DMA_CCR_CHNEN 0x00000200
-#define TX3927_DMA_CCR_XFACT 0x00000100
-#define TX3927_DMA_CCR_SNOP 0x00000080
-#define TX3927_DMA_CCR_DSTINC 0x00000040
-#define TX3927_DMA_CCR_SRCINC 0x00000020
-#define TX3927_DMA_CCR_XFSZ(order) (((order) << 2) & 0x0000001c)
-#define TX3927_DMA_CCR_XFSZ_1W TX3927_DMA_CCR_XFSZ(2)
-#define TX3927_DMA_CCR_XFSZ_4W TX3927_DMA_CCR_XFSZ(4)
-#define TX3927_DMA_CCR_XFSZ_8W TX3927_DMA_CCR_XFSZ(5)
-#define TX3927_DMA_CCR_XFSZ_16W TX3927_DMA_CCR_XFSZ(6)
-#define TX3927_DMA_CCR_XFSZ_32W TX3927_DMA_CCR_XFSZ(7)
-#define TX3927_DMA_CCR_MEMIO 0x00000002
-#define TX3927_DMA_CCR_ONEAD 0x00000001
-
-/* bits for CSRn */
-#define TX3927_DMA_CSR_CHNACT 0x00000100
-#define TX3927_DMA_CSR_ABCHC 0x00000080
-#define TX3927_DMA_CSR_NCHNC 0x00000040
-#define TX3927_DMA_CSR_NTRNFC 0x00000020
-#define TX3927_DMA_CSR_EXTDN 0x00000010
-#define TX3927_DMA_CSR_CFERR 0x00000008
-#define TX3927_DMA_CSR_CHERR 0x00000004
-#define TX3927_DMA_CSR_DESERR 0x00000002
-#define TX3927_DMA_CSR_SORERR 0x00000001
-
-/*
- * IRC
- */
-#define TX3927_IR_INT0 0
-#define TX3927_IR_INT1 1
-#define TX3927_IR_INT2 2
-#define TX3927_IR_INT3 3
-#define TX3927_IR_INT4 4
-#define TX3927_IR_INT5 5
-#define TX3927_IR_SIO0 6
-#define TX3927_IR_SIO1 7
-#define TX3927_IR_SIO(ch) (6 + (ch))
-#define TX3927_IR_DMA 8
-#define TX3927_IR_PIO 9
-#define TX3927_IR_PCI 10
-#define TX3927_IR_TMR(ch) (13 + (ch))
-#define TX3927_NUM_IR 16
-
-/*
- * PCIC
- */
-/* bits for PCICMD */
-/* see PCI_COMMAND_XXX in linux/pci.h */
-
-/* bits for PCISTAT */
-/* see PCI_STATUS_XXX in linux/pci.h */
-#define PCI_STATUS_NEW_CAP 0x0010
-
-/* bits for ISTAT/IIM */
-#define TX3927_PCIC_IIM_ALL 0x00001600
-
-/* bits for TC */
-#define TX3927_PCIC_TC_OF16E 0x00000020
-#define TX3927_PCIC_TC_IF8E 0x00000010
-#define TX3927_PCIC_TC_OF8E 0x00000008
-
-/* bits for TSTAT/TIM */
-#define TX3927_PCIC_TIM_ALL 0x0003ffff
-
-/* bits for IOBA/MBA */
-/* see PCI_BASE_ADDRESS_XXX in linux/pci.h */
-
-/* bits for PBAPMC */
-#define TX3927_PCIC_PBAPMC_RPBA 0x00000004
-#define TX3927_PCIC_PBAPMC_PBAEN 0x00000002
-#define TX3927_PCIC_PBAPMC_BMCEN 0x00000001
-
-/* bits for LBSTAT/LBIM */
-#define TX3927_PCIC_LBIM_ALL 0x0000003e
-
-/* bits for PCISTATIM (see also PCI_STATUS_XXX in linux/pci.h */
-#define TX3927_PCIC_PCISTATIM_ALL 0x0000f900
-
-/* bits for LBC */
-#define TX3927_PCIC_LBC_IBSE 0x00004000
-#define TX3927_PCIC_LBC_TIBSE 0x00002000
-#define TX3927_PCIC_LBC_TMFBSE 0x00001000
-#define TX3927_PCIC_LBC_HRST 0x00000800
-#define TX3927_PCIC_LBC_SRST 0x00000400
-#define TX3927_PCIC_LBC_EPCAD 0x00000200
-#define TX3927_PCIC_LBC_MSDSE 0x00000100
-#define TX3927_PCIC_LBC_CRR 0x00000080
-#define TX3927_PCIC_LBC_ILMDE 0x00000040
-#define TX3927_PCIC_LBC_ILIDE 0x00000020
-
-#define TX3927_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
-#define TX3927_PCIC_MAX_DEVNU TX3927_PCIC_IDSEL_AD_TO_SLOT(32)
-
-/*
- * CCFG
- */
-/* CCFG : Chip Configuration */
-#define TX3927_CCFG_TLBOFF 0x00020000
-#define TX3927_CCFG_BEOW 0x00010000
-#define TX3927_CCFG_WR 0x00008000
-#define TX3927_CCFG_TOE 0x00004000
-#define TX3927_CCFG_PCIXARB 0x00002000
-#define TX3927_CCFG_PCI3 0x00001000
-#define TX3927_CCFG_PSNP 0x00000800
-#define TX3927_CCFG_PPRI 0x00000400
-#define TX3927_CCFG_PLLM 0x00000030
-#define TX3927_CCFG_ENDIAN 0x00000004
-#define TX3927_CCFG_HALT 0x00000002
-#define TX3927_CCFG_ACEHOLD 0x00000001
-
-/* PCFG : Pin Configuration */
-#define TX3927_PCFG_SYSCLKEN 0x08000000
-#define TX3927_PCFG_SDRCLKEN_ALL 0x07c00000
-#define TX3927_PCFG_SDRCLKEN(ch) (0x00400000<<(ch))
-#define TX3927_PCFG_PCICLKEN_ALL 0x003c0000
-#define TX3927_PCFG_PCICLKEN(ch) (0x00040000<<(ch))
-#define TX3927_PCFG_SELALL 0x0003ffff
-#define TX3927_PCFG_SELCS 0x00020000
-#define TX3927_PCFG_SELDSF 0x00010000
-#define TX3927_PCFG_SELSIOC_ALL 0x0000c000
-#define TX3927_PCFG_SELSIOC(ch) (0x00004000<<(ch))
-#define TX3927_PCFG_SELSIO_ALL 0x00003000
-#define TX3927_PCFG_SELSIO(ch) (0x00001000<<(ch))
-#define TX3927_PCFG_SELTMR_ALL 0x00000e00
-#define TX3927_PCFG_SELTMR(ch) (0x00000200<<(ch))
-#define TX3927_PCFG_SELDONE 0x00000100
-#define TX3927_PCFG_INTDMA_ALL 0x000000f0
-#define TX3927_PCFG_INTDMA(ch) (0x00000010<<(ch))
-#define TX3927_PCFG_SELDMA_ALL 0x0000000f
-#define TX3927_PCFG_SELDMA(ch) (0x00000001<<(ch))
-
-#define tx3927_sdramcptr ((struct tx3927_sdramc_reg *)TX3927_SDRAMC_REG)
-#define tx3927_romcptr ((struct tx3927_romc_reg *)TX3927_ROMC_REG)
-#define tx3927_dmaptr ((struct tx3927_dma_reg *)TX3927_DMA_REG)
-#define tx3927_pcicptr ((struct tx3927_pcic_reg *)TX3927_PCIC_REG)
-#define tx3927_ccfgptr ((struct tx3927_ccfg_reg *)TX3927_CCFG_REG)
-#define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch))
-#define tx3927_pioptr ((struct txx9_pio_reg __iomem *)TX3927_PIO_REG)
-
-#define TX3927_REV_PCODE() (tx3927_ccfgptr->crir >> 16)
-#define TX3927_ROMC_BA(ch) (tx3927_romcptr->cr[(ch)] & 0xfff00000)
-#define TX3927_ROMC_SIZE(ch) \
- (0x00100000 << ((tx3927_romcptr->cr[(ch)] >> 8) & 0xf))
-#define TX3927_ROMC_WIDTH(ch) (32 >> ((tx3927_romcptr->cr[(ch)] >> 7) & 0x1))
-
-void tx3927_wdt_init(void);
-void tx3927_setup(void);
-void tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr);
-void tx3927_sio_init(unsigned int sclk, unsigned int cts_mask);
-struct pci_controller;
-void tx3927_pcic_setup(struct pci_controller *channel,
- unsigned long sdram_size, int extarb);
-void tx3927_setup_pcierr_irq(void);
-void tx3927_irq_init(void);
-void tx3927_mtd_init(int ch);
-
-#endif /* __ASM_TXX9_TX3927_H */
diff --git a/arch/mips/include/asm/txx9irq.h b/arch/mips/include/asm/txx9irq.h
index 68a6650a4025..3875243bb56b 100644
--- a/arch/mips/include/asm/txx9irq.h
+++ b/arch/mips/include/asm/txx9irq.h
@@ -21,11 +21,7 @@
#endif
#endif
-#ifdef CONFIG_CPU_TX39XX
-#define TXx9_MAX_IR 16
-#else
#define TXx9_MAX_IR 32
-#endif
void txx9_irq_init(unsigned long baseaddr);
int txx9_irq(void);
diff --git a/arch/mips/include/asm/txx9tmr.h b/arch/mips/include/asm/txx9tmr.h
index 466a3def3866..a051b411368e 100644
--- a/arch/mips/include/asm/txx9tmr.h
+++ b/arch/mips/include/asm/txx9tmr.h
@@ -58,10 +58,6 @@ void txx9_clockevent_init(unsigned long baseaddr, int irq,
unsigned int imbusclk);
void txx9_tmr_init(unsigned long baseaddr);
-#ifdef CONFIG_CPU_TX39XX
-#define TXX9_TIMER_BITS 24
-#else
#define TXX9_TIMER_BITS 32
-#endif
#endif /* __ASM_TXX9TMR_H */
diff --git a/arch/mips/include/asm/vermagic.h b/arch/mips/include/asm/vermagic.h
index 0904de0b5e09..1c33922eb945 100644
--- a/arch/mips/include/asm/vermagic.h
+++ b/arch/mips/include/asm/vermagic.h
@@ -22,8 +22,6 @@
#define MODULE_PROC_FAMILY "MIPS64_R6 "
#elif defined CONFIG_CPU_R3000
#define MODULE_PROC_FAMILY "R3000 "
-#elif defined CONFIG_CPU_TX39XX
-#define MODULE_PROC_FAMILY "TX39XX "
#elif defined CONFIG_CPU_VR41XX
#define MODULE_PROC_FAMILY "VR41XX "
#elif defined CONFIG_CPU_R4300