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Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc7280-idp.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sc7280-idp.dtsi240
1 files changed, 228 insertions, 12 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index a74e0b730db6..cd432a2856a7 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -20,6 +20,42 @@
serial1 = &uart7;
};
+ max98360a: audio-codec-0 {
+ compatible = "maxim,max98360a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&amp_en>;
+ sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
+ #sound-dai-cells = <0>;
+ };
+
+ wcd9385: audio-codec-1 {
+ compatible = "qcom,wcd9385-codec";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&wcd_reset_n>;
+ pinctrl-1 = <&wcd_reset_n_sleep>;
+
+ reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
+
+ qcom,rx-device = <&wcd_rx>;
+ qcom,tx-device = <&wcd_tx>;
+
+ vdd-rxtx-supply = <&vreg_l18b_1p8>;
+ vdd-io-supply = <&vreg_l18b_1p8>;
+ vdd-buck-supply = <&vreg_l17b_1p8>;
+ vdd-mic-bias-supply = <&vreg_bob>;
+
+ qcom,micbias1-microvolt = <1800000>;
+ qcom,micbias2-microvolt = <1800000>;
+ qcom,micbias3-microvolt = <1800000>;
+ qcom,micbias4-microvolt = <1800000>;
+
+ qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
+ 500000 500000 500000>;
+ qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
+ qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
+ #sound-dai-cells = <1>;
+ };
+
gpio-keys {
compatible = "gpio-keys";
label = "gpio-keys";
@@ -49,6 +85,104 @@
pinctrl-names = "default";
pinctrl-0 = <&nvme_pwren>;
};
+
+ sound: sound {
+ compatible = "google,sc7280-herobrine";
+ model = "sc7280-wcd938x-max98360a-1mic";
+
+ audio-routing =
+ "IN1_HPHL", "HPHL_OUT",
+ "IN2_HPHR", "HPHR_OUT",
+ "AMIC1", "MIC BIAS1",
+ "AMIC2", "MIC BIAS2",
+ "VA DMIC0", "MIC BIAS3",
+ "VA DMIC1", "MIC BIAS3",
+ "VA DMIC2", "MIC BIAS1",
+ "VA DMIC3", "MIC BIAS1",
+ "TX SWR_ADC0", "ADC1_OUTPUT",
+ "TX SWR_ADC1", "ADC2_OUTPUT",
+ "TX SWR_ADC2", "ADC3_OUTPUT",
+ "TX SWR_DMIC0", "DMIC1_OUTPUT",
+ "TX SWR_DMIC1", "DMIC2_OUTPUT",
+ "TX SWR_DMIC2", "DMIC3_OUTPUT",
+ "TX SWR_DMIC3", "DMIC4_OUTPUT",
+ "TX SWR_DMIC4", "DMIC5_OUTPUT",
+ "TX SWR_DMIC5", "DMIC6_OUTPUT",
+ "TX SWR_DMIC6", "DMIC7_OUTPUT",
+ "TX SWR_DMIC7", "DMIC8_OUTPUT";
+
+ qcom,msm-mbhc-hphl-swh = <1>;
+ qcom,msm-mbhc-gnd-swh = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #sound-dai-cells = <0>;
+
+ dai-link@0 {
+ link-name = "MAX98360A";
+ reg = <0>;
+
+ cpu {
+ sound-dai = <&lpass_cpu MI2S_SECONDARY>;
+ };
+
+ codec {
+ sound-dai = <&max98360a>;
+ };
+ };
+
+ dai-link@1 {
+ link-name = "DisplayPort";
+ reg = <1>;
+
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_DP_RX>;
+ };
+
+ codec {
+ sound-dai = <&mdss_dp>;
+ };
+ };
+
+ dai-link@2 {
+ link-name = "WCD9385 Playback";
+ reg = <2>;
+
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
+ };
+
+ codec {
+ sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
+ };
+ };
+
+ dai-link@3 {
+ link-name = "WCD9385 Capture";
+ reg = <3>;
+
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
+ };
+
+ codec {
+ sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
+ };
+ };
+
+ dai-link@4 {
+ link-name = "DMIC";
+ reg = <4>;
+
+ cpu {
+ sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
+ };
+
+ codec {
+ sound-dai = <&lpass_va_macro 0>;
+ };
+ };
+ };
};
&apps_rsc {
@@ -246,9 +380,50 @@
modem-init;
};
+&lpass_cpu {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
+
+ dai-link@1 {
+ reg = <MI2S_SECONDARY>;
+ qcom,playback-sd-lines = <0>;
+ };
+
+ dai-link@5 {
+ reg = <LPASS_DP_RX>;
+ };
+
+ dai-link@6 {
+ reg = <LPASS_CDC_DMA_RX0>;
+ };
+
+ dai-link@19 {
+ reg = <LPASS_CDC_DMA_TX3>;
+ };
+
+ dai-link@25 {
+ reg = <LPASS_CDC_DMA_VA_TX0>;
+ };
+};
+
+&lpass_rx_macro {
+ status = "okay";
+};
+
+&lpass_tx_macro {
+ status = "okay";
+};
+
+&lpass_va_macro {
+ status = "okay";
+ vdd-micb-supply = <&vreg_bob>;
+};
+
&pcie1 {
status = "okay";
- perst-gpio = <&tlmm 2 GPIO_ACTIVE_LOW>;
+ perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
vddpe-3v3-supply = <&nvme_3v3_regulator>;
@@ -264,7 +439,7 @@
};
&pmk8350_vadc {
- pmk8350_die_temp {
+ pmk8350-die-temp@3 {
reg = <PMK8350_ADC7_DIE_TEMP>;
label = "pmk8350_die_temp";
qcom,pre-scaling = <1 1>;
@@ -306,6 +481,28 @@
cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
};
+&swr0 {
+ status = "okay";
+
+ wcd_rx: codec@0,4 {
+ compatible = "sdw20217010d00";
+ reg = <0 4>;
+ #sound-dai-cells = <1>;
+ qcom,rx-port-mapping = <1 2 3 4 5>;
+ };
+};
+
+&swr1 {
+ status = "okay";
+
+ wcd_tx: codec@0,3 {
+ compatible = "sdw20217010d00";
+ reg = <0 3>;
+ #sound-dai-cells = <1>;
+ qcom,tx-port-mapping = <1 2 3 4>;
+ };
+};
+
&uart5 {
compatible = "qcom,geni-debug-uart";
status = "okay";
@@ -550,18 +747,24 @@
};
&tlmm {
- bt_en: bt-en {
+ amp_en: amp-en {
+ pins = "gpio63";
+ bias-pull-down;
+ drive-strength = <2>;
+ };
+
+ bt_en: bt-en-pins {
pins = "gpio85";
function = "gpio";
output-low;
bias-disable;
};
- nvme_pwren: nvme-pwren {
+ nvme_pwren: nvme-pwren-pins {
function = "gpio";
};
- pcie1_reset_n: pcie1-reset-n {
+ pcie1_reset_n: pcie1-reset-n-pins {
pins = "gpio2";
function = "gpio";
@@ -570,7 +773,7 @@
bias-disable;
};
- pcie1_wake_n: pcie1-wake-n {
+ pcie1_wake_n: pcie1-wake-n-pins {
pins = "gpio3";
function = "gpio";
@@ -578,7 +781,7 @@
bias-pull-up;
};
- qup_uart7_sleep_cts: qup-uart7-sleep-cts {
+ qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
pins = "gpio28";
function = "gpio";
/*
@@ -591,7 +794,7 @@
bias-bus-hold;
};
- qup_uart7_sleep_rts: qup-uart7-sleep-rts {
+ qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
pins = "gpio29";
function = "gpio";
/*
@@ -603,7 +806,7 @@
bias-pull-down;
};
- qup_uart7_sleep_tx: qup-uart7-sleep-tx {
+ qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
pins = "gpio30";
function = "gpio";
/*
@@ -613,7 +816,7 @@
bias-pull-up;
};
- qup_uart7_sleep_rx: qup-uart7-sleep-rx {
+ qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
pins = "gpio31";
function = "gpio";
/*
@@ -624,15 +827,28 @@
bias-pull-up;
};
- sd_cd: sd-cd {
+ sd_cd: sd-cd-pins {
pins = "gpio91";
function = "gpio";
bias-pull-up;
};
- sw_ctrl: sw-ctrl {
+ sw_ctrl: sw-ctrl-pins {
pins = "gpio86";
function = "gpio";
bias-pull-down;
};
+
+ wcd_reset_n: wcd-reset-n {
+ pins = "gpio83";
+ function = "gpio";
+ drive-strength = <8>;
+ };
+
+ wcd_reset_n_sleep: wcd-reset-n-sleep {
+ pins = "gpio83";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-disable;
+ };
};
generated by cgit v1.2.3 (git 2.39.0) at 2025-02-01 20:35:40 +0300