diff options
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8994.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8994.dtsi | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index 8bc6c070e306..ded5b7ceeaf9 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -6,6 +6,7 @@ #include <dt-bindings/clock/qcom,gcc-msm8994.h> #include <dt-bindings/clock/qcom,mmcc-msm8994.h> #include <dt-bindings/clock/qcom,rpmcc.h> +#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/power/qcom-rpmpd.h> / { @@ -164,12 +165,6 @@ reg = <0 0x80000000 0 0>; }; - tcsr_mutex: hwlock { - compatible = "qcom,tcsr-mutex"; - syscon = <&tcsr_mutex_regs 0 0x80>; - #hwlock-cells = <1>; - }; - pmu { compatible = "arm,cortex-a53-pmu"; interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4)| IRQ_TYPE_LEVEL_HIGH)>; @@ -464,7 +459,7 @@ sdhc1: mmc@f9824900 { compatible = "qcom,msm8994-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>; - reg-names = "hc_mem", "core_mem"; + reg-names = "hc", "core"; interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; @@ -487,7 +482,7 @@ sdhc2: mmc@f98a4900 { compatible = "qcom,msm8994-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; - reg-names = "hc_mem", "core_mem"; + reg-names = "hc", "core"; interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; @@ -502,7 +497,7 @@ pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>; - cd-gpios = <&tlmm 100 0>; + cd-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>; bus-width = <4>; status = "disabled"; }; @@ -762,9 +757,10 @@ #interrupt-cells = <4>; }; - tcsr_mutex_regs: syscon@fd484000 { - compatible = "syscon"; - reg = <0xfd484000 0x2000>; + tcsr_mutex: hwlock@fd484000 { + compatible = "qcom,msm8994-tcsr-mutex", "qcom,tcsr-mutex"; + reg = <0xfd484000 0x1000>; + #hwlock-cells = <1>; }; tlmm: pinctrl@fd510000 { |