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-rw-r--r--Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml1
-rw-r--r--Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt22
-rw-r--r--Documentation/devicetree/bindings/pwm/pwm-samsung.yaml4
-rw-r--r--Documentation/devicetree/bindings/pwm/ti,omap-dmtimer-pwm.yaml59
4 files changed, 63 insertions, 23 deletions
diff --git a/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml b/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml
index 153e146df7d4..afcdeed4e88a 100644
--- a/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml
+++ b/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml
@@ -8,7 +8,6 @@ title: MediaTek DISP_PWM Controller
maintainers:
- Jitao Shi <jitao.shi@mediatek.com>
- - Xinlei Lee <xinlei.lee@mediatek.com>
allOf:
- $ref: pwm.yaml#
diff --git a/Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt b/Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt
deleted file mode 100644
index 25ecfe14c698..000000000000
--- a/Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-* OMAP PWM for dual-mode timers
-
-Required properties:
-- compatible: Shall contain "ti,omap-dmtimer-pwm".
-- ti,timers: phandle to PWM capable OMAP timer. See timer/ti,timer-dm.yaml for info
- about these timers.
-- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
- the cells format.
-
-Optional properties:
-- ti,prescaler: Should be a value between 0 and 7, see the timers datasheet
-- ti,clock-source: Set dmtimer parent clock, values between 0 and 2:
- - 0x00 - high-frequency system clock (timer_sys_ck)
- - 0x01 - 32-kHz always-on clock (timer_32k_ck)
- - 0x02 - external clock (timer_ext_ck, OMAP2 only)
-
-Example:
- pwm9: dmtimer-pwm@9 {
- compatible = "ti,omap-dmtimer-pwm";
- ti,timers = <&timer9>;
- #pwm-cells = <3>;
- };
diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
index 2162f661ed5a..17a2b927af33 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
+++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
@@ -29,7 +29,11 @@ properties:
- samsung,exynos4210-pwm # 32-bit, Exynos
- items:
- enum:
+ - samsung,exynos5433-pwm
+ - samsung,exynos7-pwm
- samsung,exynosautov9-pwm
+ - samsung,exynosautov920-pwm
+ - tesla,fsd-pwm
- const: samsung,exynos4210-pwm
reg:
diff --git a/Documentation/devicetree/bindings/pwm/ti,omap-dmtimer-pwm.yaml b/Documentation/devicetree/bindings/pwm/ti,omap-dmtimer-pwm.yaml
new file mode 100644
index 000000000000..1e8e094aad74
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/ti,omap-dmtimer-pwm.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/ti,omap-dmtimer-pwm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TI dual mode timer PWM controller
+
+maintainers:
+ - Tony Lindgren <tony@atomide.com>
+
+description:
+ TI dual mode timer instances have an IO pin for PWM capability
+
+allOf:
+ - $ref: pwm.yaml#
+
+properties:
+ compatible:
+ const: ti,omap-dmtimer-pwm
+
+ "#pwm-cells":
+ const: 3
+
+ ti,timers:
+ description: Timer instance phandle for the PWM
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ ti,prescaler:
+ description: |
+ Legacy clock prescaler for timer. The timer counter is prescaled
+ with 2^n where n is the prescaler.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [ 0, 1, 2, 3, 4, 5, 6, 7 ]
+ deprecated: true
+
+ ti,clock-source:
+ description: |
+ Legacy clock for timer, please use assigned-clocks instead.
+ 0x00 - high-frequency system clock (timer_sys_ck)
+ 0x01 - 32-kHz always-on clock (timer_32k_ck)
+ 0x02 - external clock (timer_ext_ck, OMAP2 only)
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [ 0, 1, 2 ]
+ deprecated: true
+
+required:
+ - compatible
+ - ti,timers
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ pwm9: pwm {
+ compatible = "ti,omap-dmtimer-pwm";
+ ti,timers = <&timer9>;
+ #pwm-cells = <3>;
+ };