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-rw-r--r--arch/sh/drivers/pci/pci-sh7751.c8
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.c1
-rw-r--r--arch/sh/include/asm/pci.h1
3 files changed, 0 insertions, 10 deletions
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c
index af8874436d2f..4c08fd7f665d 100644
--- a/arch/sh/drivers/pci/pci-sh7751.c
+++ b/arch/sh/drivers/pci/pci-sh7751.c
@@ -40,7 +40,6 @@ int __init sh7751_pci_init(struct pci_channel *chan)
pr_debug("PCI: Starting intialization.\n");
chan->reg_base = 0xfe200000;
- chan->io_base = 0xfe240000;
/* check for SH7751/SH7751R hardware */
id = pci_read_reg(chan, SH7751_PCICONF0);
@@ -136,13 +135,6 @@ int __init sh7751_pcic_init(struct pci_channel *chan,
pr_debug("PCI: Setting upper bits of Memory window to 0x%x\n", word);
pci_write_reg(chan, word , SH4_PCIMBR);
- /* Map IO space into PCI IO window:
- * IO addresses will be translated to the PCI IO window base address
- */
- pr_debug("PCI: Mapping IO address 0x%x - 0x%x to base 0x%lx\n",
- chan->io_resource->start, chan->io_resource->end,
- chan->io_base + chan->io_resource->start);
-
/* Make sure the MSB's of IO window are set to access PCI space
* correctly */
word = chan->io_resource->start & SH4_PCIIOBR_MASK;
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index 57a3b870a276..ae13ff925c61 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -62,7 +62,6 @@ static int __init sh7780_pci_init(void)
printk(KERN_NOTICE "PCI: Starting intialization.\n");
chan->reg_base = 0xfe040000;
- chan->io_base = 0xfe200000;
/* Enable CPU access to the PCIC registers. */
__raw_writel(PCIECR_ENBL, PCIECR);
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index 0be20521a1fe..f36c7899295b 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -33,7 +33,6 @@ struct pci_channel {
int enabled;
unsigned long reg_base;
- unsigned long io_base;
unsigned long io_map_base;
};