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-rw-r--r--drivers/gpu/drm/i915/intel_display.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 602d23cd2b0c..47332a164fcb 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13613,16 +13613,6 @@ static int intel_atomic_commit(struct drm_device *dev,
if (!state->legacy_cursor_update)
intel_atomic_wait_for_vblanks(dev, dev_priv, crtc_vblank_mask);
- for_each_crtc_in_state(state, crtc, old_crtc_state, i) {
- intel_post_plane_update(to_intel_crtc_state(old_crtc_state));
-
- if (put_domains[i])
- modeset_put_power_domains(dev_priv, put_domains[i]);
- }
-
- if (intel_state->modeset)
- intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET);
-
/*
* Now that the vblank has passed, we can go ahead and program the
* optimal watermarks on platforms that need two-step watermark
@@ -13637,6 +13627,16 @@ static int intel_atomic_commit(struct drm_device *dev,
dev_priv->display.optimize_watermarks(intel_cstate);
}
+ for_each_crtc_in_state(state, crtc, old_crtc_state, i) {
+ intel_post_plane_update(to_intel_crtc_state(old_crtc_state));
+
+ if (put_domains[i])
+ modeset_put_power_domains(dev_priv, put_domains[i]);
+ }
+
+ if (intel_state->modeset)
+ intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET);
+
mutex_lock(&dev->struct_mutex);
drm_atomic_helper_cleanup_planes(dev, state);
mutex_unlock(&dev->struct_mutex);