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author | Bryan O'Donoghue <bryan.odonoghue@linaro.org> | 2023-08-30 18:16:13 +0300 |
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committer | Hans Verkuil <hverkuil-cisco@xs4all.nl> | 2023-09-27 10:39:54 +0300 |
commit | d8f7e1a60d01739a1d78db2b08603089c6cf7c8e (patch) | |
tree | 46f012cc8aa914fc470a0f73d15a03c7e62b0f07 /virt | |
parent | b6e1bdca463a932c1ac02caa7d3e14bf39288e0c (diff) | |
download | linux-d8f7e1a60d01739a1d78db2b08603089c6cf7c8e.tar.xz |
media: qcom: camss: Fix invalid clock enable bit disjunction
define CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE BIT(7)
disjunction for gen2 ? BIT(7) : is a nop we are setting the same bit
either way.
Fixes: 4abb21309fda ("media: camss: csiphy: Move to hardcode CSI Clock Lane number")
Cc: stable@vger.kernel.org
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Diffstat (limited to 'virt')
0 files changed, 0 insertions, 0 deletions