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author | Catalin Marinas <catalin.marinas@arm.com> | 2023-10-26 19:10:07 +0300 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2023-10-26 19:10:07 +0300 |
commit | 2baca17e6a54b70e3b6d1b50f98ab71f770e4b95 (patch) | |
tree | 04ddedcb84a55148339303a3de050d75c37e636a /tools/testing/selftests/arm64 | |
parent | 023113fe66b4866b0d211b705e8bd287728f2e98 (diff) | |
parent | 72e301956dbb31bd679eff66fbe3da32d2dc2af5 (diff) | |
download | linux-2baca17e6a54b70e3b6d1b50f98ab71f770e4b95.tar.xz |
Merge branch 'for-next/feat_lse128' into for-next/core
* for-next/feat_lse128:
: HWCAP for FEAT_LSE128
kselftest/arm64: add FEAT_LSE128 to hwcap test
arm64: add FEAT_LSE128 HWCAP
Diffstat (limited to 'tools/testing/selftests/arm64')
-rw-r--r-- | tools/testing/selftests/arm64/abi/hwcap.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c index a60f23794944..1189e77c8152 100644 --- a/tools/testing/selftests/arm64/abi/hwcap.c +++ b/tools/testing/selftests/arm64/abi/hwcap.c @@ -81,6 +81,20 @@ static void lrcpc_sigill(void) asm volatile(".inst 0xb8bfc3e0" : : : ); } +static void lse128_sigill(void) +{ + u64 __attribute__ ((aligned (16))) mem[2] = { 10, 20 }; + register u64 *memp asm ("x0") = mem; + register u64 val0 asm ("x1") = 5; + register u64 val1 asm ("x2") = 4; + + /* SWPP X1, X2, [X0] */ + asm volatile(".inst 0x19228001" + : "+r" (memp), "+r" (val0), "+r" (val1) + : + : "cc", "memory"); +} + static void mops_sigill(void) { char dst[1], src[1]; @@ -391,6 +405,13 @@ static const struct hwcap_data { .sigbus_reliable = true, }, { + .name = "LSE128", + .at_hwcap = AT_HWCAP2, + .hwcap_bit = HWCAP2_LSE128, + .cpuinfo = "lse128", + .sigill_fn = lse128_sigill, + }, + { .name = "MOPS", .at_hwcap = AT_HWCAP2, .hwcap_bit = HWCAP2_MOPS, |