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authorShawn Lin <shawn.lin@rock-chips.com>2016-12-08 00:05:58 +0300
committerBjorn Helgaas <bhelgaas@google.com>2016-12-08 00:05:58 +0300
commitb8ab8e041cc0356323c1e4aee8047ea479650340 (patch)
treeea3ee0e51fb9849440427e86196eb42d58738e4c /tools/perf/scripts
parent4816c4c7b82b55bb46cb9b85ef8e6780fc618592 (diff)
downloadlinux-b8ab8e041cc0356323c1e4aee8047ea479650340.tar.xz
PCI: rockchip: Mark RC as common clock architecture
The default value of common clock configuration is zero indicating Rockchip's RC is using asynchronous clock architecture but actually we are using common clock. This will confuse some EP drivers if they need some different settings referring to this value. Set the Common Clock Configuration bit in the Link Control Register. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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