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| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2023-02-22 06:49:39 +0300 |
|---|---|---|
| committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2023-03-25 23:38:10 +0300 |
| commit | fb97147ad2956cff0e9fa2f6407c93bc9242db9b (patch) | |
| tree | 6285e0bb9f5ac0aa21556f411b25ceb621381d90 /tools/perf/scripts/python | |
| parent | ec1c6ff81e8e2123b4d727b2b9ac74049b7c2b52 (diff) | |
| download | linux-fb97147ad2956cff0e9fa2f6407c93bc9242db9b.tar.xz | |
drm: rcar-du: Don't write unimplemented ESCR and OTAR registers on Gen3
The ESCR and OTAR registers are not present in all DU channels on Gen3
SoCs. ESCR only exists in channels that can be routed to an LVDS or
DPAD, and OTAR in channels that can be routed to a DPAD. Skip writing
those registers for other channels. This replaces the DU gen check, as
Gen4 doesn't have LVDS or DPAD outputs.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions