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| author | Bibby Hsieh <bibby.hsieh@mediatek.com> | 2016-09-29 06:29:49 +0300 |
|---|---|---|
| committer | CK Hu <ck.hu@mediatek.com> | 2016-10-19 04:06:12 +0300 |
| commit | 56e4b1e183555c74097fa012f1606b22223f027b (patch) | |
| tree | 680f968f614f327ea6e07ca07d19d7d5fba1a546 /tools/perf/scripts/python | |
| parent | f752fff611b99f5679224f3990a1f531ea64b1ec (diff) | |
| download | linux-56e4b1e183555c74097fa012f1606b22223f027b.tar.xz | |
drm/mediatek: clear IRQ status before enable OVL interrupt
To make sure that the first vblank IRQ after enabling
vblank isn't too short or immediate, we have to clear
the IRQ status before enable OVL interrupt.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Acked-by: CK Hu <ck.hu@mediatek.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions