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| author | Yan-Hsuan Chuang <yhchuang@realtek.com> | 2020-02-05 10:08:54 +0300 |
|---|---|---|
| committer | Kalle Valo <kvalo@codeaurora.org> | 2020-02-12 19:18:25 +0300 |
| commit | 2a4225551afbf8a0f8486c88a934f649766a186d (patch) | |
| tree | 65eae49249dbcfc4ee74f4ca24bf29c8b40a44d7 /tools/perf/scripts/python | |
| parent | 9e01c07069dbd0e025352d958c873a6504f8ce1b (diff) | |
| download | linux-2a4225551afbf8a0f8486c88a934f649766a186d.tar.xz | |
rtw88: pci: 8822c should set clock delay to zero
Since RTL8822CE has enabled reference clock auto calibration,
there is no need to add any clock delay for covering the timing
gap of the reference clock.
Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions