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| author | Duncan Ma <duncan.ma@amd.com> | 2022-08-24 21:35:03 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-09-13 21:27:00 +0300 |
| commit | 0b15b1ec8b74bd5c9a4e4cbadab82c0657832799 (patch) | |
| tree | ff5f0212a7dcca99195a66804d5828242c3e0b96 /tools/perf/scripts/python/task-analyzer.py | |
| parent | 82c4018479fba63db8db7c7fbfd9e4afba95603a (diff) | |
| download | linux-0b15b1ec8b74bd5c9a4e4cbadab82c0657832799.tar.xz | |
drm/amd/display: Correct dram channel width for dcn314
[Why]
The interpretation of the number of memory channels
differ by memory type, and this affects channel width
for the DML input.
[How]
Set dram channel width according to memory type for
dcn314.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Duncan Ma <duncan.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions