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| author | Danylo Piliaiev <dpiliaiev@igalia.com> | 2023-11-25 22:11:50 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2023-11-25 22:16:04 +0300 |
| commit | cf1aaa7d4a719f0bdd9c246c0fac8247cb54ddd7 (patch) | |
| tree | 7d89826c879a46130e8612bcee80d54d3c3baf0b /tools/perf/scripts/python/syscall-counts.py | |
| parent | 6c15808d9b7640c3209d53cd2d8d56cfbf9f7175 (diff) | |
| download | linux-cf1aaa7d4a719f0bdd9c246c0fac8247cb54ddd7.tar.xz | |
drm/msm/a6xx: Add missing BIT(7) to REG_A6XX_UCHE_CLIENT_PF
Downstream always set BIT(7)
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/568930/
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions